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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?WjP6hMa0lDBQFFnFrrnEFqkSruh7741lyQ4GH1D1KOzvZKWGgqCwTSyf3QyD?= =?us-ascii?Q?EcerlixIsLm9RubW4AmoIhVDgCx9mKDugL3ILTRB/TJK/ApXRSeOJYouoRpd?= =?us-ascii?Q?5pSW9Rnifww0RYx9VgdHyTL/ruTMzswPKrC6ZhLdUPPbQwRxBd2QMKP4eZcv?= =?us-ascii?Q?C30QLR9wEPFv+Up0LdIM+eOmQPWr4UXPN0SUkt2RzUhpicPmBGPFIxo20LDK?= =?us-ascii?Q?AGFdxEZx0MwKtcW2M7YIfIelMJ5pxZ6wZQjqC3MOTqaypX9PqViRSA7aaKFT?= =?us-ascii?Q?t9nleuSmUobENju00w/GDY68iClyHztvQ1Ds6jBuSaws4xpP/Qkq4xtqtB95?= =?us-ascii?Q?ZhZzg73h2xhuGcMXGNtrWQRj99DnWwt8m7duPr0m8ujDDRwpRKXFEgmYbxI9?= =?us-ascii?Q?OpZb8rqeCND+ow+JVcqnoMS9SMgUM9fUmSEG6S85ucMfTalRdQDJ7CcT3rY1?= =?us-ascii?Q?e737zxRh4gin+Zy7cE9TCsXAqR5f/G3TW7sKg9EalQMU7AgbNuYsCeUybxGe?= =?us-ascii?Q?aCVtsXwaiq2EQOag529fzMt5kZtIpXhzFbzKPRWUX4D78RhipnDmKB8rW98Z?= =?us-ascii?Q?g4rieAoBPavo0b2NXt3oQYGzYZetfAVUwEayWEWgoi11blsl32eLB/IDBkOE?= =?us-ascii?Q?0xse/IMenAkIr4uJCBDgB8yda94TwTaOOoWhZsZgZ9DV8UkYYCXeSEIO5x0x?= =?us-ascii?Q?lrHn0bYnaxVDBkdeuZTCAkwVnclc+UM1M4C7kENwQCG6KS0F3rcZYzie9yl1?= =?us-ascii?Q?ZuUm5det1fLZMkpN1X55VGMFPVWEqRPKxejitqNPzSECsiOtpZ6e4lkex8tb?= =?us-ascii?Q?HlsvthxNYvEGqJ4sfrU6CpPubrsJbrxQX5/uLstDqjK9oIXSGmlvenEbS/hg?= =?us-ascii?Q?CxVVB4LgxiVKY4OzplUtUTHFcdtgdU5MUMm6kZDGDYeAWgREG+MAF1tZkjDu?= =?us-ascii?Q?/pOtMLBMbNTY+WlVmd3bTf9fZFG6MOzKhGPk6g3gxNtf/MrbpuhVSaqKnugk?= =?us-ascii?Q?Jb5paT/O73HoJIbI5ayNqV2rUGQo0An6T4EpwhwbMNoiwLFQ1aeISZ7EIG7r?= =?us-ascii?Q?k8WTHkDTkOftOSV2ZAijV5pScn2vcnS7xb5X4rsYXJytbRWv4ehix0cXD+KO?= =?us-ascii?Q?D8BwGQevob6Tjr4w6EF5vzNEZTlVeXa7ny2HW1Py8CZOChQZqxa+Xik1yNJN?= =?us-ascii?Q?ijmNbmwDQGviHKOfb1fntGyWpdlUSD7KT4N2bdweK9nBTHh2tlx8qD1BXIVk?= =?us-ascii?Q?bB/p+squcPEHh96dWUEfo2PHN1la8moDj9+fAIloQ5AYPY+639t6u31ufHsD?= =?us-ascii?Q?AqE7BUz07gT4u5J3p7tYJfsoCeIPu0gQdgr+fv/c9TTCupjnnG+NMVfaRHKc?= =?us-ascii?Q?fUtFnRsUWMBW06wHKBcYOXEGnMFaAF1kA6coPBmMKF8gOvykfMnr+zfsKycj?= =?us-ascii?Q?1GurW0FeviON2edHElRRVUPXKgkoQ7edZyFjbpGH+3UbvZYBZvXBAiFKgV7i?= =?us-ascii?Q?hyA+jMZJOP2e9uHfUj5itwLrdqtG1Am6TYnJQadeARyU7Uo0F2Fg35cWQKh2?= =?us-ascii?Q?kB5KEEJLOkLQEgjMKFngIE76eS/uS9LHvXyHS61OXOS45nvaNWKHOXW/4aWy?= =?us-ascii?Q?dZFEKrQiDKg140mhYK5/mOnoTs+a3L4bypEV1RPPYJeiexShlD+3O8/nX0nj?= =?us-ascii?Q?XoZ7fRGHyPNacSPrDCRmS8tcuA83Fp5arbUSk00F4Mq1FT7v7CJejHRfnA0I?= =?us-ascii?Q?5j2z2a/SJQ=3D=3D?= X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-Network-Message-Id: 86ff8064-f7d8-4750-533b-08def7666ec0 X-MS-Exchange-CrossTenant-AuthSource: DS0PR12MB7726.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Aug 2026 05:07:25.1319 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: BQCe3VGW+V331bEgMsX7qCBUQxem3S4tiBymu/OUYlBaSFWWwtbcj702vtBlbPw2YBLPFQiv5x0NFc07h3aE6Q== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ2PR12MB9088 The chipid contains the GPU architecture and implementation and needs to be exposed to user-space. This adds a public enum to the userspace headers for each chip ID. Nova-core can then use this enum to define its chipsets. This does create a coupling between nova-drm and nova-core whereby nova-core depends on the values defined by the user-space API for nova-drm. However this is entirely appropriate as nova-core must be bound by the UAPI headers as the enum values are read by nova-core and passed through to user-space. Note that nova-core currently refers to the chipid as a chipset. This isn't ideal given that chipid is the preferred and more accurate term and is what should be exposed via the uAPI. Therefore a future patch series will be posted that aligns nova-core internals to using chipid rather than chipset. Signed-off-by: Alistair Popple --- Changes since v3: - New for v4, split out from "drm: nova: Add GETPARAM parameter to read the GPU chipset" --- drivers/gpu/nova-core/gpu.rs | 64 +++++++++++++++++++----------------- include/uapi/drm/nova_drm.h | 38 +++++++++++++++++++++ 2 files changed, 72 insertions(+), 30 deletions(-) diff --git a/drivers/gpu/nova-core/gpu.rs b/drivers/gpu/nova-core/gpu.rs index 442c0979f9c6..738a590e753b 100644 --- a/drivers/gpu/nova-core/gpu.rs +++ b/drivers/gpu/nova-core/gpu.rs @@ -10,7 +10,8 @@ num::Bounded, pci, prelude::*, - sizes::SizeConstants, // + sizes::SizeConstants, + uapi, // }; use crate::{ @@ -35,12 +36,13 @@ mod hal; macro_rules! define_chipset { - ({ $($variant:ident = $value:expr),* $(,)* }) => + ({ $($variant:ident),* $(,)* }) => { + ::kernel::macros::paste!( /// Enum representation of the GPU chipset. #[derive(fmt::Debug, Copy, Clone, PartialOrd, Ord, PartialEq, Eq)] pub(crate) enum Chipset { - $($variant = $value),*, + $($variant = uapi::[] as isize),*, } impl Chipset { @@ -48,7 +50,6 @@ impl Chipset { $( Chipset::$variant, )* ]; - ::kernel::macros::paste!( /// Returns the name of this chipset, in lowercase. /// /// # Examples @@ -64,7 +65,6 @@ pub(crate) const fn name(&self) -> &'static str { )* } } - ); } // TODO[FPRI]: replace with something like derive(FromPrimitive) @@ -73,45 +73,49 @@ impl TryFrom for Chipset { fn try_from(value: u32) -> Result { match value { - $( $value => Ok(Chipset::$variant), )* + $( + uapi::[] + => Ok(Chipset::$variant), + )* _ => Err(ENODEV), } } } + ); } } define_chipset!({ // Turing - TU102 = 0x162, - TU104 = 0x164, - TU106 = 0x166, - TU117 = 0x167, - TU116 = 0x168, + TU102, + TU104, + TU106, + TU117, + TU116, // Ampere - GA100 = 0x170, - GA102 = 0x172, - GA103 = 0x173, - GA104 = 0x174, - GA106 = 0x176, - GA107 = 0x177, + GA100, + GA102, + GA103, + GA104, + GA106, + GA107, // Hopper - GH100 = 0x180, + GH100, // Ada - AD102 = 0x192, - AD103 = 0x193, - AD104 = 0x194, - AD106 = 0x196, - AD107 = 0x197, + AD102, + AD103, + AD104, + AD106, + AD107, // Blackwell GB10x - GB100 = 0x1a0, - GB102 = 0x1a2, + GB100, + GB102, // Blackwell GB20x - GB202 = 0x1b2, - GB203 = 0x1b3, - GB205 = 0x1b5, - GB206 = 0x1b6, - GB207 = 0x1b7, + GB202, + GB203, + GB205, + GB206, + GB207, }); impl Chipset { diff --git a/include/uapi/drm/nova_drm.h b/include/uapi/drm/nova_drm.h index 3ca90ed9d2bb..ea7665383644 100644 --- a/include/uapi/drm/nova_drm.h +++ b/include/uapi/drm/nova_drm.h @@ -25,6 +25,44 @@ extern "C" { */ #define NOVA_GETPARAM_VRAM_BAR_SIZE 0x1 +/* + * Opaque chipids. These may be used to determine what chip a particular GPU is + * based on the identifier but the values themselves should not be assumed to + * carry any particular meaning. + */ +enum drm_nova_chipid { + /* Turing */ + NOVA_DRM_CHIPID_TU102 = 0x162, + NOVA_DRM_CHIPID_TU104 = 0x164, + NOVA_DRM_CHIPID_TU106 = 0x166, + NOVA_DRM_CHIPID_TU117 = 0x167, + NOVA_DRM_CHIPID_TU116 = 0x168, + /* Ampere */ + NOVA_DRM_CHIPID_GA100 = 0x170, + NOVA_DRM_CHIPID_GA102 = 0x172, + NOVA_DRM_CHIPID_GA103 = 0x173, + NOVA_DRM_CHIPID_GA104 = 0x174, + NOVA_DRM_CHIPID_GA106 = 0x176, + NOVA_DRM_CHIPID_GA107 = 0x177, + /* Hopper */ + NOVA_DRM_CHIPID_GH100 = 0x180, + /* Ada */ + NOVA_DRM_CHIPID_AD102 = 0x192, + NOVA_DRM_CHIPID_AD103 = 0x193, + NOVA_DRM_CHIPID_AD104 = 0x194, + NOVA_DRM_CHIPID_AD106 = 0x196, + NOVA_DRM_CHIPID_AD107 = 0x197, + /* Blackwell GB10x */ + NOVA_DRM_CHIPID_GB100 = 0x1a0, + NOVA_DRM_CHIPID_GB102 = 0x1a2, + /* Blackwell GB20x */ + NOVA_DRM_CHIPID_GB202 = 0x1b2, + NOVA_DRM_CHIPID_GB203 = 0x1b3, + NOVA_DRM_CHIPID_GB205 = 0x1b5, + NOVA_DRM_CHIPID_GB206 = 0x1b6, + NOVA_DRM_CHIPID_GB207 = 0x1b7, +}; + /** * struct drm_nova_getparam - query GPU and driver metadata */ -- 2.54.0