From: sashiko-bot@kernel.org
To: "Lakshay Piplani" <lakshay.piplani@nxp.com>
Cc: robh@kernel.org, devicetree@vger.kernel.org,
linux-watchdog@vger.kernel.org,
"Alexandre Belloni" <alexandre.belloni@bootlin.com>,
conor+dt@kernel.org, linux-rtc@vger.kernel.org
Subject: Re: [RESEND v4 1/5] dt-bindings: rtc: nxp,pcf85363: add timestamp mode config
Date: Wed, 12 Aug 2026 07:49:47 +0000 [thread overview]
Message-ID: <20260812074947.CAE841F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260812074533.3545058-1-lakshay.piplani@nxp.com>
> NXP PCF85263/PCF85363 provides three timestamp registers (TSR1-TSR3)
> which latch the current time when a selected event occurs. Add a
> vendor specific property, nxp,timestamp-mode, to select the event
> source for each register.
>
> Also introduce a new header 'pcf85363-tsr.h' to expose
> macros for timestamp mode fields, improving readability
> of device tree file.
>
> Signed-off-by: Lakshay Piplani <lakshay.piplani@nxp.com>
Sashiko has reviewed this patch and found no issues. It looks great!
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260812074533.3545058-1-lakshay.piplani@nxp.com?part=1
prev parent reply other threads:[~2026-08-12 7:49 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-12 7:45 [RESEND v4 1/5] dt-bindings: rtc: nxp,pcf85363: add timestamp mode config Lakshay Piplani
2026-08-12 7:45 ` [RESEND v4 2/5] rtc: pcf85363: support reporting battery switch-over via RTC_VL Lakshay Piplani
2026-08-12 7:55 ` sashiko-bot
2026-08-12 7:45 ` [RESEND v4 3/5] rtc: pcf85363: add timestamp support with configurable timestamp mode Lakshay Piplani
2026-08-12 7:58 ` sashiko-bot
2026-08-12 7:45 ` [RESEND v4 4/5] rtc: pcf85363: add oscillator offset calibration support Lakshay Piplani
2026-08-12 8:00 ` sashiko-bot
2026-08-12 7:45 ` [RESEND v4 5/5] rtc: pcf85363: add watchdog support with configurable step size Lakshay Piplani
2026-08-12 7:57 ` sashiko-bot
2026-08-12 7:49 ` sashiko-bot [this message]
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