From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 04788C5AD5A for ; Wed, 12 Aug 2026 19:37:56 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A1A9B10E455; Wed, 12 Aug 2026 19:37:55 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="Yl6gGmCH"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.10]) by gabe.freedesktop.org (Postfix) with ESMTPS id 6160010E44B for ; Wed, 12 Aug 2026 19:37:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1786563474; x=1818099474; h=from:to:subject:date:message-id:mime-version: content-transfer-encoding; bh=JTcQYnBITt3MzVv4+d7MjkqsyYiQbb4f2EgdzAGx/tw=; b=Yl6gGmCH7Jj1F3s6UA5I22sI4rIvNuu5RCBnf11glcstWV36HvRZ5ZxZ 985YqmBA68qhECtcZJ0nW11BXYyyZYfcUu8jjWhhEtoZNMyum4Gw6lpvG 40GKu+t5kfFGJZV8vwAcScsjFHQlkyQ/MADzSO638cPOmuYACDLFPoTJV XyyZ8sXBgnntKvWx69DSnDsccT3QmM/Am0TbbgcUQV3Ze9h9hPA1o6Kfi uj76ihcHYXgPvyjt6THs+gySBLRsvfxvwNFQY+5DOU4GE6tVArMigLg8j XMlWi29ubKPX/Fusl2xdOQ0r91FxmYnAfR3tQnyjuMo/Ez0px9/iJiyGN A==; X-CSE-ConnectionGUID: wEBSzMehQkCFDI9/VZX5Wg== X-CSE-MsgGUID: bbt301MnR/GsuVhsf8iK8Q== X-IronPort-AV: E=McAfee;i="6800,10657,11873"; a="104515362" X-IronPort-AV: E=Sophos;i="6.25,220,1779174000"; d="scan'208";a="104515362" Received: from orviesa007.jf.intel.com ([10.64.159.147]) by orvoesa102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Aug 2026 12:37:54 -0700 X-CSE-ConnectionGUID: kC4FqONSSca/nqaZ9qVfNg== X-CSE-MsgGUID: D+X2rnkYTCiAMes2vY6a3w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.25,220,1779174000"; d="scan'208";a="263779909" Received: from mjruhl-vm.amr.corp.intel.com ([10.11.186.166]) by orviesa007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Aug 2026 12:37:53 -0700 From: "Michael J. Ruhl" To: platform-driver-x86@vger.kernel.org, intel-xe@lists.freedesktop.org, hansg@kernel.org, ilpo.jarvinen@linux.intel.com, matthew.brost@intel.com, rodrigo.vivi@intel.com, thomas.hellstrom@linux.intel.com, airlied@gmail.com, simona@ffwll.ch, david.e.box@linux.intel.com, anoop.c.vijay@intel.com, badal.nilawar@intel.com, matthew.d.roper@intel.com, james.ausmus@intel.com Subject: [PATCH v2 00/10] Crescent Island PMT support Date: Wed, 12 Aug 2026 12:37:41 -0700 Message-ID: <20260812193742.2170188-12-michael.j.ruhl@intel.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" The Crescent Island (CRI) GPU supports PMT via Xe driver registration. The CRI PMT MMIO mapping is shared for each PMT feature and it is necessary to set an index register value to access the correct memory space. The PMT driver has a callback infrastructure to access data areas with driver specific access. It is does not support the PMT control access. CRI discovery/control spaces are part of the access window so a driver callback is necessary to allow for the correct window to be exposed. Add control path callback support to the PMT driver. Add CRI PMT discovery information. Update the Xe driver to support the CRI PMT access. The crashlog access needs to be done with power enabled (telem is only available when the device is powered). Determine which access is requested, and do the appropriate power request. CRI FW is loaded at device power. Support the late-binding API to wait for FW readiness. (pending sysctl patch set implements the API). v2: Address AI feedback: - add missing entry->cb check - address SRIOV VF concerns - use xe_pm_runtime_put instead of _get in error path Address review comments: - redo power/lock sequencing - support device hotplug events Michael J. Ruhl (10): platform/x86/intel/pmt: complete pcidev to device update platform/x86/intel/pmt: Add register access callbacks drm/xe/vsec: Protect against missing config drm/xe/vsec: Use correct pm state get drm/xe/vsec: Support possible hotplug exit drm/xe/vsec: Support Crescent Island PMT drm/xe/vsec: Crescent Island PMT decode drm/xe/vsec: Crescent Island PMT callbacks drm/xe/vsec: Support late bind fw information drm/xe/vsec: Update PMT internal access for CRI drivers/gpu/drm/xe/regs/xe_pmt.h | 9 +- drivers/gpu/drm/xe/xe_debugfs.c | 30 +- drivers/gpu/drm/xe/xe_device.c | 4 +- drivers/gpu/drm/xe/xe_device_types.h | 6 + drivers/gpu/drm/xe/xe_hwmon.c | 10 +- drivers/gpu/drm/xe/xe_pcode.c | 10 +- drivers/gpu/drm/xe/xe_vsec.c | 529 +++++++++++++++++++-- drivers/gpu/drm/xe/xe_vsec.h | 3 +- drivers/platform/x86/intel/pmt/class.c | 5 +- drivers/platform/x86/intel/pmt/class.h | 3 +- drivers/platform/x86/intel/pmt/crashlog.c | 39 +- drivers/platform/x86/intel/pmt/discovery.c | 2 +- include/linux/intel_vsec.h | 14 +- 13 files changed, 593 insertions(+), 71 deletions(-) -- 2.43.0