From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AEF41472F8A; Thu, 13 Aug 2026 12:00:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786622400; cv=none; b=A77oK8PZ4pfxOMY+EsB5Wyo30MSC2xiBml/ol7lJeTYFXJnFJT69TUqrGkuU8xXOh0pM8O6jzgMDVaGHWE0cPTF/3wB4G50e7w3oJtLNJxn0ERAg9I1iNuCY8gjEGduC9Pb7xC0Ly4MTSRD0WEp+GlGdKtpczI/SuQJWN7ZWnK4= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786622400; c=relaxed/simple; bh=k65C478t9LS6ybUmJ6TjN8D7vgzFZCksmeumxEQZ8Wo=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=KuMlxiWjLkqbaSVJ2hNm3WvspUv19VN58gygA1wetWFfwb/ZiQeFzZ9sAu7NXEAlYQZfF7ojGiLFX8qjmNJWMjqLxFr1NlN6oinRvgh0f29NWlgJTtx8dHBeQ2rbQn7TDQ2iLHSZ+6DXaEmZiSOfm5MvqW08TwHlF/0b1RfL7rA= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=lvkB3xA7; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="lvkB3xA7" Received: by smtp.kernel.org (Postfix) with ESMTPS id 25CC0C32781; Thu, 13 Aug 2026 12:00:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1786622400; bh=k65C478t9LS6ybUmJ6TjN8D7vgzFZCksmeumxEQZ8Wo=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=lvkB3xA7ZUggxd62T2EQdw29xvWCTWX6bJJz+bv5e3lV5Z5jjg4PIz44Z8PaKqAqe URTHnHOZc4VJYwisaeW4yRbtSRot98AoINoaiUHClmGXbo1aZHTAD541JBgcqpC3IV JLX2droK/jfcTpvsYfL3olU73L3YrAaQah23BFUlSdhP/APMRU/Jbc9o5RH1wQuG25 PWuA9UseUiPj8e3ZvrlvLXK++5hk1bjtJGO2qr5CZk0+Fhq9zlLuXAlRvJmAjT+3P0 GEGPeU8XxXdn2UyK/OjokxrglaGBOUoDXIdeuaEZLbDW5O5x4Dv87otw6K+WyOVVVX Ky4+5mwTGH13Q== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0B8A0C5CFDB; Thu, 13 Aug 2026 12:00:00 +0000 (UTC) From: Colin Huang via B4 Relay Date: Thu, 13 Aug 2026 19:59:37 +0800 Subject: [PATCH v5 07/15] ARM: dts: aspeed: anacapa: Align PDB fan GPIO numbering Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260813-anacapa-devlop-phase-devicetree-v5-7-c7058f63dc67@gmail.com> References: <20260813-anacapa-devlop-phase-devicetree-v5-0-c7058f63dc67@gmail.com> In-Reply-To: <20260813-anacapa-devlop-phase-devicetree-v5-0-c7058f63dc67@gmail.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley , Andrew Jeffery Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org, colin.huang2@amd.com, Colin Huang , Rex Fu X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1786622378; l=1875; i=u8813345@gmail.com; s=20260202; h=from:subject:message-id; bh=3/IZc5ckSnwOY8uhbyA0jZSDZ3Dvh/PJORxqtTJG7yA=; b=Gi8/BUaK6w/lKB1qUOTSspYGZjOdu9INBp5iNvnYDcG7DCdDLt20S4ocFvStYtDvtxWDm9KIa 26YnUygqETECBixfRo80FOtfZv9WwQ0KpDk9+SXwm+/70w3t5dDt6+y X-Developer-Key: i=u8813345@gmail.com; a=ed25519; pk=Zlg0WqpCw4qbswOqamTBTXIchwR/3SnYZpy7rjaGMdQ= X-Endpoint-Received: by B4 Relay for u8813345@gmail.com/20260202 with auth_id=761 X-Original-From: Colin Huang Reply-To: u8813345@gmail.com From: Rex Fu Update the LPDB and RPDB fan GPIO line names to align with the platform fan numbering scheme. The LPDB fan GPIOs are named FAN0 through FAN4, while the RPDB fan GPIOs are named FAN5 through FAN8. This keeps the GPIO line names consistent with the fan inventory and platform-level fan numbering. Signed-off-by: Rex Fu Signed-off-by: Colin Huang --- .../aspeed/aspeed-bmc-facebook-anacapa-evt2.dts | 33 ++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt2.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt2.dts index c7bffa7c6557..ff393ad7cdb7 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt2.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt2.dts @@ -8,6 +8,39 @@ / { compatible = "facebook,anacapa-bmc-evt2", "aspeed,ast2600"; }; +// MB - PDB +&i2c8 { + i2c-mux@72 { + i2c8mux0ch0: i2c@0 { + gpio@24 { + gpio-line-names = + "RPDB_EAM2_PRSNT_MOS_N_R", "RPDB_EAM3_PRSNT_MOS_N_R", + "RPDB_PWRGD_P50V_HSC4_SYS_R", + "RPDB_PWRGD_P50V_STBY_SYS_BUF_R", + "RPDB_P50V_FAN5_R2_PG", "RPDB_P50V_FAN6_R2_PG", + "RPDB_P50V_FAN7_R2_PG", "RPDB_P50V_FAN8_R2_PG", + "", "RPDB_FAN5_PRSNT_N_R", + "", "RPDB_FAN6_PRSNT_N_R", + "RPDB_FAN7_PRSNT_N_R", "RPDB_FAN8_PRSNT_N_R", + "", ""; + }; + }; + i2c8mux0ch1: i2c@1 { + gpio@24 { + gpio-line-names = + "LPDB_P50V_FAN0_R2_PG","LPDB_P50V_FAN1_R2_PG", + "LPDB_P50V_FAN2_R2_PG","LPDB_P50V_FAN3_R2_PG", + "LPDB_P50V_FAN4_R2_PG","LPDB_FAN0_PRSNT_N_R", + "LPDB_FAN1_PRSNT_N_R","LPDB_FAN2_PRSNT_N_R", + "LPDB_FAN3_PRSNT_N_R","LPDB_FAN4_PRSNT_N_R", + "","", + "","", + "",""; + }; + }; + }; +}; + // SCM &i2c9 { -- 2.34.1 From mboxrd@z Thu Jan 1 00:00:00 1970 From: Colin Huang Date: Thu, 13 Aug 2026 19:59:37 +0800 Subject: [PATCH v5 07/15] ARM: dts: aspeed: anacapa: Align PDB fan GPIO numbering MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260813-anacapa-devlop-phase-devicetree-v5-7-c7058f63dc67@gmail.com> References: <20260813-anacapa-devlop-phase-devicetree-v5-0-c7058f63dc67@gmail.com> In-Reply-To: <20260813-anacapa-devlop-phase-devicetree-v5-0-c7058f63dc67@gmail.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley , Andrew Jeffery Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org, colin.huang2@amd.com, Colin Huang , Rex Fu X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1786622378; l=1875; i=u8813345@gmail.com; s=20260202; h=from:subject:message-id; bh=3/IZc5ckSnwOY8uhbyA0jZSDZ3Dvh/PJORxqtTJG7yA=; b=Gi8/BUaK6w/lKB1qUOTSspYGZjOdu9INBp5iNvnYDcG7DCdDLt20S4ocFvStYtDvtxWDm9KIa 26YnUygqETECBixfRo80FOtfZv9WwQ0KpDk9+SXwm+/70w3t5dDt6+y X-Developer-Key: i=u8813345@gmail.com; a=ed25519; pk=Zlg0WqpCw4qbswOqamTBTXIchwR/3SnYZpy7rjaGMdQ= X-Endpoint-Received: by B4 Relay for u8813345@gmail.com/20260202 with auth_id=761 List-Id: B4 Relay Submissions From: Rex Fu Update the LPDB and RPDB fan GPIO line names to align with the platform fan numbering scheme. The LPDB fan GPIOs are named FAN0 through FAN4, while the RPDB fan GPIOs are named FAN5 through FAN8. This keeps the GPIO line names consistent with the fan inventory and platform-level fan numbering. Signed-off-by: Rex Fu Signed-off-by: Colin Huang --- .../aspeed/aspeed-bmc-facebook-anacapa-evt2.dts | 33 ++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt2.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt2.dts index c7bffa7c6557..ff393ad7cdb7 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt2.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt2.dts @@ -8,6 +8,39 @@ / { compatible = "facebook,anacapa-bmc-evt2", "aspeed,ast2600"; }; +// MB - PDB +&i2c8 { + i2c-mux@72 { + i2c8mux0ch0: i2c@0 { + gpio@24 { + gpio-line-names = + "RPDB_EAM2_PRSNT_MOS_N_R", "RPDB_EAM3_PRSNT_MOS_N_R", + "RPDB_PWRGD_P50V_HSC4_SYS_R", + "RPDB_PWRGD_P50V_STBY_SYS_BUF_R", + "RPDB_P50V_FAN5_R2_PG", "RPDB_P50V_FAN6_R2_PG", + "RPDB_P50V_FAN7_R2_PG", "RPDB_P50V_FAN8_R2_PG", + "", "RPDB_FAN5_PRSNT_N_R", + "", "RPDB_FAN6_PRSNT_N_R", + "RPDB_FAN7_PRSNT_N_R", "RPDB_FAN8_PRSNT_N_R", + "", ""; + }; + }; + i2c8mux0ch1: i2c@1 { + gpio@24 { + gpio-line-names = + "LPDB_P50V_FAN0_R2_PG","LPDB_P50V_FAN1_R2_PG", + "LPDB_P50V_FAN2_R2_PG","LPDB_P50V_FAN3_R2_PG", + "LPDB_P50V_FAN4_R2_PG","LPDB_FAN0_PRSNT_N_R", + "LPDB_FAN1_PRSNT_N_R","LPDB_FAN2_PRSNT_N_R", + "LPDB_FAN3_PRSNT_N_R","LPDB_FAN4_PRSNT_N_R", + "","", + "","", + "",""; + }; + }; + }; +}; + // SCM &i2c9 { -- 2.34.1