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Thu, 13 Aug 2026 06:35:08 -0700 (PDT) Received: from leonardoc-nb ([179.160.38.252]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-31ebc75d891sm8447990eec.5.2026.08.13.06.35.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Aug 2026 06:35:07 -0700 (PDT) From: Leonardo Costa To: Frank.Li@nxp.com, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org Cc: imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Leonardo Costa Subject: [PATCH 6/6] arm64: dts: freescale: imx8mp-verdin: Add Mezzanine with Toradex Display 10.1" LVDS V2 Date: Thu, 13 Aug 2026 10:33:35 -0300 Message-ID: <20260813133335.1941580-7-leoreis.costa@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260813133335.1941580-1-leoreis.costa@gmail.com> References: <20260813133335.1941580-1-leoreis.costa@gmail.com> Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Leonardo Costa Add a device tree overlay enabling the Toradex Capacitive Touch Display 10.1" LVDS V2 on the Verdin Development Board with Verdin iMX8M Plus Mezzanine expansion board. The panel connects via the i.MX8M Plus LCDIF on the Mezzanine LVDS interface (J10). The panel is an Opto Logic SCX1001511GGC49 10.1" WXGA TFT LCD LVDS and the touch input is provided by an ILITEK ILI251x capacitive touch controller. Link: https://developer.toradex.com/hardware/accessories/displays/capacitive-touch-display-101inch-lvds Link: https://developer.toradex.com/hardware/verdin-som-family/add-ons/verdin-imx8m-plus-mezzanine Signed-off-by: Leonardo Costa --- arch/arm64/boot/dts/freescale/Makefile | 5 + ...zanine-panel-cap-touch-10inch-lvds-v2.dtso | 107 ++++++++++++++++++ 2 files changed, 112 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-verdin-dev-mezzanine-panel-cap-touch-10inch-lvds-v2.dtso diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile index 236bfb6a1e19..39c5f0db5203 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -509,6 +509,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw74xx.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw75xx-2x.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw82xx-2x.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-dev-mezzanine-panel-cap-touch-10inch-lvds.dtbo +dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-dev-mezzanine-panel-cap-touch-10inch-lvds-v2.dtbo dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-dsi-to-lvds-panel-cap-touch-10inch.dtbo dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-dsi-to-lvds-v2-panel-cap-touch-10inch.dtbo dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-nonwifi-dahlia.dtb @@ -524,6 +525,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-wifi-dev.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-wifi-dev-dsi-to-lvds-panel-cap-touch-10inch.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-wifi-dev-dsi-to-lvds-v2-panel-cap-touch-10inch.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-wifi-dev-mezzanine-panel-cap-touch-10inch-lvds.dtb +dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-wifi-dev-mezzanine-panel-cap-touch-10inch-lvds-v2.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-wifi-ivy.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-wifi-mallow.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-wifi-mallow-panel-cap-touch-10inch-lvds.dtb @@ -540,6 +542,9 @@ imx8mp-verdin-wifi-dev-dsi-to-lvds-v2-panel-cap-touch-10inch-dtbs := \ imx8mp-verdin-wifi-dev-mezzanine-panel-cap-touch-10inch-lvds-dtbs := \ imx8mp-verdin-wifi-dev.dtb \ imx8mp-verdin-dev-mezzanine-panel-cap-touch-10inch-lvds.dtbo +imx8mp-verdin-wifi-dev-mezzanine-panel-cap-touch-10inch-lvds-v2-dtbs := \ + imx8mp-verdin-wifi-dev.dtb \ + imx8mp-verdin-dev-mezzanine-panel-cap-touch-10inch-lvds-v2.dtbo imx8mp-verdin-wifi-mallow-panel-cap-touch-10inch-lvds-dtbs := \ imx8mp-verdin-wifi-mallow.dtb \ imx8mp-verdin-panel-cap-touch-10inch-lvds.dtbo diff --git a/arch/arm64/boot/dts/freescale/imx8mp-verdin-dev-mezzanine-panel-cap-touch-10inch-lvds-v2.dtso b/arch/arm64/boot/dts/freescale/imx8mp-verdin-dev-mezzanine-panel-cap-touch-10inch-lvds-v2.dtso new file mode 100644 index 000000000000..b78322907192 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8mp-verdin-dev-mezzanine-panel-cap-touch-10inch-lvds-v2.dtso @@ -0,0 +1,107 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (c) Toradex + * + * Toradex Capacitive Touch Display 10.1" LVDS V2 on the Verdin iMX8M Plus + * Mezzanine LVDS interface (J10), used with the Verdin Development Board. + * + * https://developer.toradex.com/hardware/accessories/displays/capacitive-touch-display-101inch-lvds + * https://www.toradex.com/accessories/capacitive-touch-display-10.1-inch-lvds + * https://developer.toradex.com/hardware/verdin-som-family/add-ons/verdin-imx8m-plus-mezzanine + * https://www.toradex.com/accessories/verdin-imx8m-plus-mezzanine + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include + +#include "imx8mp-pinfunc.h" + +&{/} { + panel-lvds-native { + compatible = "optologic,scx1001511ggc49", "panel-lvds"; + backlight = <&backlight_mezzanine>; + data-mapping = "vesa-24"; + power-supply = <®_3p3v>; + height-mm = <136>; + width-mm = <217>; + + panel-timing { + clock-frequency = <64500000>; + hactive = <1280>; + hback-porch = <20>; + hfront-porch = <20>; + hsync-len = <2>; + vactive = <800>; + vback-porch = <5>; + vfront-porch = <5>; + vsync-len = <3>; + de-active = <1>; + hsync-active = <0>; + vsync-active = <0>; + pixelclk-active = <0>; + }; + + port { + panel_lvds_native_in: endpoint { + remote-endpoint = <&ldb_lvds_ch0>; + }; + }; + }; +}; + +&backlight_mezzanine { + /* Verdin PWM_2 (SODIMM 16) */ + pwms = <&pwm2 0 6666667 0>; + + status = "okay"; +}; + +/* Verdin I2C_2_DSI */ +&i2c2 { + #address-cells = <1>; + #size-cells = <0>; + + touchscreen@41 { + compatible = "ilitek,ili251x"; + reg = <0x41>; + /* Verdin GPIO_3 (SODIMM 210) */ + interrupt-parent = <&gpio1>; + interrupts = <5 IRQ_TYPE_EDGE_RISING>; + /* Verdin GPIO_2 (SODIMM 208) */ + reset-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; + }; +}; + +&lcdif2 { + status = "okay"; +}; + +&lvds_bridge { + assigned-clocks = <&clk IMX8MP_CLK_MEDIA_LDB>, + <&clk IMX8MP_VIDEO_PLL1>; + /* + * This display uses 64.5 MHz pixel clock, so IMX8MP_VIDEO_PLL1 needs + * to be 7 times 64.5MHz, or 451.5 MHz as the internal divider will + * always divide the output LVDS clock by 7. + */ + assigned-clock-rates = <0>, <451500000>; + + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + reg = <1>; + + ldb_lvds_ch0: endpoint { + remote-endpoint = <&panel_lvds_native_in>; + }; + }; + }; +};