From: sashiko-bot@kernel.org
To: "Sascha Bischoff" <Sascha.Bischoff@arm.com>
Cc: kvmarm@lists.linux.dev, "Oliver Upton" <oupton@kernel.org>,
kvm@vger.kernel.org, "Marc Zyngier" <maz@kernel.org>
Subject: Re: [PATCH v6 29/39] KVM: arm64: gic-v5: Enlighten arch timer for GICv5
Date: Thu, 13 Aug 2026 22:24:33 +0000 [thread overview]
Message-ID: <20260813222434.2426E1F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260317113949.2548118-30-sascha.bischoff@arm.com>
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] Guest-driven 100% host CPU soft lockup due to unconditional timer polling bypassing VGIC mask state on WFI.
- [High] `KVM_SET_DEVICE_ATTR` for timer IRQs unconditionally fails for GICv5 due to a mismatch between raw and internal bit-packed INTIDs, breaking VM initialization.
--
--- Patch [29]: [PATCH v6 29/39] KVM: arm64: gic-v5: Enlighten arch timer for GICv5 ---
commit f6d424766abc019a2ae7837f0e736e6af4c5961c
Author: Sascha Bischoff <Sascha.Bischoff@arm.com>
KVM: arm64: gic-v5: Enlighten arch timer for GICv5
This commit updates the KVM architectural timer to support GICv5 features,
including direct virtual interrupt (DVI) injection for mapped timers and
mandatory architected PPI assignments. It modifies how interrupts are queued,
masked, and validated to align with GICv5 requirements.
> diff --git a/arch/arm64/kvm/arch_timer.c b/arch/arm64/kvm/arch_timer.c
> index 53312b88c342d..4575c36cae537 100644
> --- a/arch/arm64/kvm/arch_timer.c
> +++ b/arch/arm64/kvm/arch_timer.c
[ ... ]
> @@ -396,7 +406,11 @@ static bool kvm_timer_should_fire(struct arch_timer_context *timer_ctx)
>
> int kvm_cpu_has_pending_timer(struct kvm_vcpu *vcpu)
> {
> - return vcpu_has_wfit_active(vcpu) && wfit_delay_ns(vcpu) == 0;
> + struct arch_timer_context *vtimer = vcpu_vtimer(vcpu);
> + struct arch_timer_context *ptimer = vcpu_ptimer(vcpu);
> +
> + return kvm_timer_should_fire(vtimer) || kvm_timer_should_fire(ptimer) ||
> + (vcpu_has_wfit_active(vcpu) && wfit_delay_ns(vcpu) == 0);
> }
[Severity: High]
Can this cause a host soft lockup if the guest executes a WFI?
If a guest masks the timer interrupt in the VGIC but leaves it enabled in the
timer's control register, kvm_timer_should_fire() will still return true since
it only checks the timer's internal state. When the guest then executes WFI,
kvm_vcpu_block() will see a pending timer via kvm_cpu_has_pending_timer() and
refuse to block, immediately resuming the guest. The guest will then re-execute
WFI, resulting in an infinite tight loop.
[ ... ]
> @@ -1634,10 +1700,16 @@ int kvm_arm_timer_set_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr)
> idx = TIMER_HPTIMER;
> break;
> default:
> - ret = -ENXIO;
> - goto out;
> + return -ENXIO;
> }
>
> + /*
> + * The PPIs for the Arch Timers are architecturally defined for
> + * GICv5. Reject anything that changes them from the specified value.
> + */
> + if (vgic_is_v5(vcpu->kvm) && vcpu->kvm->arch.timer_data.ppi[idx] != irq)
> + return -EINVAL;
> +
[Severity: High]
Does this unconditionally fail for GICv5 guests?
Userspace passes a standard raw PPI ID (e.g., 27) for the irq value.
However, for GICv5, kvm_timer_init_vm() initializes
vcpu->kvm->arch.timer_data.ppi[idx] using get_vgic_ppi(), which packs
GICV5_HWIRQ_TYPE_PPI into the upper bits of the integer. Comparing this
bit-packed internal representation directly against the raw userspace
irq value will always result in a mismatch and return -EINVAL, breaking
VM initialization.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260317113949.2548118-1-sascha.bischoff@arm.com?part=29
next prev parent reply other threads:[~2026-08-13 22:24 UTC|newest]
Thread overview: 62+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-17 11:39 [PATCH v6 00/39] KVM: arm64: Introduce vGIC-v5 with PPI support Sascha Bischoff
2026-03-17 11:40 ` [PATCH v6 01/39] KVM: arm64: vgic-v3: Drop userspace write sanitization for ID_AA64PFR0.GIC on GICv5 Sascha Bischoff
2026-03-19 10:02 ` Jonathan Cameron
2026-03-19 11:35 ` Sascha Bischoff
2026-03-20 10:27 ` Jonathan Cameron
2026-03-17 11:40 ` [PATCH v6 02/39] KVM: arm64: vgic: Rework vgic_is_v3() and add vgic_host_has_gicvX() Sascha Bischoff
2026-03-17 11:40 ` [PATCH v6 03/39] KVM: arm64: Return early from kvm_finalize_sys_regs() if guest has run Sascha Bischoff
2026-03-19 10:12 ` Jonathan Cameron
2026-03-19 11:41 ` Sascha Bischoff
2026-03-17 11:40 ` [PATCH v6 04/39] KVM: arm64: vgic: Split out mapping IRQs and setting irq_ops Sascha Bischoff
2026-03-17 16:00 ` Marc Zyngier
2026-03-18 17:30 ` Sascha Bischoff
2026-03-17 11:41 ` [PATCH v6 05/39] arm64/sysreg: Add remaining GICv5 ICC_ & ICH_ sysregs for KVM support Sascha Bischoff
2026-03-17 11:41 ` [PATCH v6 06/39] arm64/sysreg: Add GICR CDNMIA encoding Sascha Bischoff
2026-03-17 11:41 ` [PATCH v6 07/39] KVM: arm64: gic-v5: Add ARM_VGIC_V5 device to KVM headers Sascha Bischoff
2026-03-17 11:42 ` [PATCH v6 08/39] KVM: arm64: gic: Introduce interrupt type helpers Sascha Bischoff
2026-03-17 11:42 ` [PATCH v6 09/39] KVM: arm64: gic-v5: Add Arm copyright header Sascha Bischoff
2026-03-17 11:42 ` [PATCH v6 10/39] KVM: arm64: gic-v5: Detect implemented PPIs on boot Sascha Bischoff
2026-03-17 11:42 ` [PATCH v6 11/39] KVM: arm64: gic-v5: Sanitize ID_AA64PFR2_EL1.GCIE Sascha Bischoff
2026-03-19 10:31 ` Jonathan Cameron
2026-03-19 14:02 ` Sascha Bischoff
2026-03-17 11:43 ` [PATCH v6 12/39] KVM: arm64: gic-v5: Support GICv5 FGTs & FGUs Sascha Bischoff
2026-03-17 11:43 ` [PATCH v6 13/39] KVM: arm64: gic-v5: Add emulation for ICC_IAFFIDR_EL1 accesses Sascha Bischoff
2026-03-19 10:34 ` Jonathan Cameron
2026-03-17 11:43 ` [PATCH v6 14/39] KVM: arm64: gic-v5: Trap and emulate ICC_IDR0_EL1 accesses Sascha Bischoff
2026-03-19 10:38 ` Jonathan Cameron
2026-03-17 11:43 ` [PATCH v6 15/39] KVM: arm64: gic-v5: Add vgic-v5 save/restore hyp interface Sascha Bischoff
2026-03-17 11:44 ` [PATCH v6 16/39] KVM: arm64: gic-v5: Implement GICv5 load/put and save/restore Sascha Bischoff
2026-03-17 11:44 ` [PATCH v6 17/39] KVM: arm64: gic-v5: Finalize GICv5 PPIs and generate mask Sascha Bischoff
2026-03-17 11:44 ` [PATCH v6 18/39] KVM: arm64: gic: Introduce queue_irq_unlock to irq_ops Sascha Bischoff
2026-03-17 11:44 ` [PATCH v6 19/39] KVM: arm64: gic-v5: Implement PPI interrupt injection Sascha Bischoff
2026-03-17 16:31 ` Marc Zyngier
2026-03-18 17:31 ` Sascha Bischoff
2026-03-17 11:45 ` [PATCH v6 20/39] KVM: arm64: gic-v5: Init Private IRQs (PPIs) for GICv5 Sascha Bischoff
2026-03-17 16:42 ` Marc Zyngier
2026-03-18 17:34 ` Sascha Bischoff
2026-03-17 11:45 ` [PATCH v6 21/39] KVM: arm64: gic-v5: Clear TWI if single task running Sascha Bischoff
2026-03-17 11:45 ` [PATCH v6 22/39] KVM: arm64: gic-v5: Check for pending PPIs Sascha Bischoff
2026-03-17 17:08 ` Marc Zyngier
2026-03-19 8:27 ` Sascha Bischoff
2026-03-17 11:45 ` [PATCH v6 23/39] KVM: arm64: gic-v5: Trap and mask guest ICC_PPI_ENABLERx_EL1 writes Sascha Bischoff
2026-03-17 11:46 ` [PATCH v6 24/39] KVM: arm64: Introduce set_direct_injection irq_op Sascha Bischoff
2026-03-17 11:46 ` [PATCH v6 25/39] KVM: arm64: gic-v5: Implement direct injection of PPIs Sascha Bischoff
2026-03-17 11:46 ` [PATCH v6 26/39] KVM: arm64: gic-v5: Support GICv5 interrupts with KVM_IRQ_LINE Sascha Bischoff
2026-03-17 11:46 ` [PATCH v6 27/39] KVM: arm64: gic-v5: Create and initialise vgic_v5 Sascha Bischoff
2026-03-17 11:47 ` [PATCH v6 28/39] KVM: arm64: gic-v5: Initialise ID and priority bits when resetting vcpu Sascha Bischoff
2026-03-17 11:47 ` [PATCH v6 29/39] KVM: arm64: gic-v5: Enlighten arch timer for GICv5 Sascha Bischoff
2026-03-17 18:05 ` Marc Zyngier
2026-03-19 8:59 ` Sascha Bischoff
2026-08-13 22:24 ` sashiko-bot [this message]
2026-03-17 11:47 ` [PATCH v6 30/39] KVM: arm64: gic-v5: Mandate architected PPI for PMU emulation on GICv5 Sascha Bischoff
2026-03-17 11:48 ` [PATCH v6 31/39] KVM: arm64: gic: Hide GICv5 for protected guests Sascha Bischoff
2026-03-17 11:48 ` [PATCH v6 32/39] KVM: arm64: gic-v5: Hide FEAT_GCIE from NV GICv5 guests Sascha Bischoff
2026-03-17 11:48 ` [PATCH v6 33/39] KVM: arm64: gic-v5: Introduce kvm_arm_vgic_v5_ops and register them Sascha Bischoff
2026-03-17 11:48 ` [PATCH v6 34/39] KVM: arm64: gic-v5: Set ICH_VCTLR_EL2.En on boot Sascha Bischoff
2026-03-17 11:49 ` [PATCH v6 35/39] KVM: arm64: gic-v5: Probe for GICv5 device Sascha Bischoff
2026-03-18 15:34 ` Joey Gouly
2026-03-19 8:36 ` Sascha Bischoff
2026-03-17 11:49 ` [PATCH v6 36/39] Documentation: KVM: Introduce documentation for VGICv5 Sascha Bischoff
2026-03-17 11:49 ` [PATCH v6 37/39] KVM: arm64: gic-v5: Communicate userspace-driveable PPIs via a UAPI Sascha Bischoff
2026-03-17 11:49 ` [PATCH v6 38/39] KVM: arm64: selftests: Introduce a minimal GICv5 PPI selftest Sascha Bischoff
2026-03-17 11:50 ` [PATCH v6 39/39] KVM: arm64: selftests: Add no-vgic-v5 selftest Sascha Bischoff
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