From: sashiko-bot@kernel.org
To: "Manikanta Maddireddy" <mmaddireddy@nvidia.com>
Cc: linux-pci@vger.kernel.org
Subject: Re: [PATCH v8 09/14] PCI: tegra194: Allow system suspend when the Endpoint link is not up
Date: Thu, 13 Aug 2026 22:41:45 +0000 [thread overview]
Message-ID: <20260813224146.009B01F00A3A@smtp.kernel.org> (raw)
In-Reply-To: <20260324190755.1094879-10-mmaddireddy@nvidia.com>
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] PM callbacks are asymmetric, missing a `.resume` callback, which leaves `pex_rst_irq` permanently disabled if the system suspend process is aborted.
- [High] Time-of-check to time-of-use (TOCTOU) race in `tegra_pcie_dw_suspend()` allows the system to suspend while the Endpoint link is active.
--
--- Patch [9]: [PATCH v8 09/14] PCI: tegra194: Allow system suspend when the Endpoint link is not up ---
commit 9f02485e505b10cc3b88208af0183e49b85c7e80
Author: Vidya Sagar <vidyas@nvidia.com>
PCI: tegra194: Allow system suspend when the Endpoint link is not up
Host software initiates the L2 sequence. PCIe link is kept in L2 state
during suspend. If Endpoint mode is enabled and the link is up, the
software cannot proceed with suspend. However, when the PCIe Endpoint
driver is probed, but the PCIe link is not up, Tegra can go into suspend
state. So, allow system to suspend in this case.
> diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c
> index f1985fca988ee..f66a93f0cf658 100644
> --- a/drivers/pci/controller/dwc/pcie-tegra194.c
> +++ b/drivers/pci/controller/dwc/pcie-tegra194.c
> @@ -2270,16 +2270,28 @@ static void tegra_pcie_dw_remove(struct platform_device *pdev)
> gpiod_set_value(pcie->pex_refclk_sel_gpiod, 0);
> }
>
> -static int tegra_pcie_dw_suspend_late(struct device *dev)
> +static int tegra_pcie_dw_suspend(struct device *dev)
> {
> struct tegra_pcie_dw *pcie = dev_get_drvdata(dev);
> - u32 val;
>
> if (pcie->of_data->mode == DW_PCIE_EP_TYPE) {
> - dev_err(dev, "Failed to Suspend as Tegra PCIe is in EP mode\n");
> - return -EPERM;
> + if (pcie->ep_state == EP_STATE_ENABLED) {
> + dev_err(dev, "Tegra PCIe is in EP mode, suspend not allowed\n");
> + return -EPERM;
> + }
> +
> + disable_irq(pcie->pex_rst_irq);
[Severity: High]
Is there a race condition between checking the endpoint state and disabling
the IRQ here?
If the host deasserts PERST# just after ep_state is checked but before
disable_irq() executes, the tegra_pcie_ep_pex_rst_irq threaded IRQ handler
could run concurrently.
This would allow the endpoint state to change to EP_STATE_ENABLED,
bypassing the safety check and allowing the system to suspend while the
link is active.
Could the IRQ be disabled prior to checking ep_state, and re-enabled on
the error path if suspend is not permitted?
> + return 0;
> }
>
> + return 0;
> +}
> +
[ ... ]
> @@ -2345,8 +2363,8 @@ static int tegra_pcie_dw_resume_early(struct device *dev)
> u32 val;
>
> if (pcie->of_data->mode == DW_PCIE_EP_TYPE) {
> - dev_err(dev, "Suspend is not supported in EP mode");
> - return -ENOTSUPP;
> + enable_irq(pcie->pex_rst_irq);
> + return 0;
> }
>
> if (!pcie->link_state)
[ ... ]
> @@ -2451,6 +2469,7 @@ static const struct of_device_id tegra_pcie_dw_of_match[] = {
> };
>
> static const struct dev_pm_ops tegra_pcie_dw_pm_ops = {
> + .suspend = tegra_pcie_dw_suspend,
> .suspend_late = tegra_pcie_dw_suspend_late,
> .suspend_noirq = tegra_pcie_dw_suspend_noirq,
> .resume_noirq = tegra_pcie_dw_resume_noirq,
[Severity: High]
Does this introduce an asymmetry in the PM callbacks by placing disable_irq()
in .suspend but enable_irq() in .resume_early?
If a system suspend is aborted due to a failure in another device's suspend
callback, the PM core rolls back by calling .resume on successfully
suspended devices. The .resume_early phase would be skipped entirely.
Because there is no .resume callback defined here to pair with .suspend,
pex_rst_irq would remain permanently disabled after a failed suspend,
breaking the PCIe endpoint PERST# reset functionality.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260324190755.1094879-1-mmaddireddy@nvidia.com?part=9
next prev parent reply other threads:[~2026-08-13 22:41 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-24 19:07 [PATCH v8 00/14] Fixes to pcie-tegra194 driver Manikanta Maddireddy
2026-03-24 19:07 ` [PATCH v8 01/14] PCI: tegra194: Fix polling delay for L2 state Manikanta Maddireddy
2026-03-24 19:07 ` [PATCH v8 02/14] PCI: tegra194: Increase LTSSM poll time on surprise down Manikanta Maddireddy
2026-03-24 19:07 ` [PATCH v8 03/14] PCI: tegra194: Disable LTSSM after transition to detect " Manikanta Maddireddy
2026-03-24 19:07 ` [PATCH v8 04/14] PCI: tegra194: Don't force the device into the D0 state before L2 Manikanta Maddireddy
2026-03-24 19:07 ` [PATCH v8 05/14] PCI: tegra194: Disable PERST IRQ only in Endpoint mode Manikanta Maddireddy
2026-03-24 19:07 ` [PATCH v8 06/14] PCI: tegra194: Use devm_gpiod_get_optional() to parse "nvidia,refclk-select" Manikanta Maddireddy
2026-03-24 19:07 ` [PATCH v8 07/14] PCI: tegra194: Disable direct speed change for Endpoint Manikanta Maddireddy
2026-03-24 19:07 ` [PATCH v8 08/14] PCI: tegra194: Set LTR message request before PCIe link up Manikanta Maddireddy
2026-03-24 19:07 ` [PATCH v8 09/14] PCI: tegra194: Allow system suspend when the Endpoint link is not up Manikanta Maddireddy
2026-04-08 20:59 ` Bjorn Helgaas
2026-04-08 21:03 ` Bjorn Helgaas
2026-04-09 6:59 ` Manikanta Maddireddy
2026-08-13 22:41 ` sashiko-bot [this message]
2026-03-24 19:07 ` [PATCH v8 10/14] PCI: tegra194: Free up EP resources during remove() Manikanta Maddireddy
2026-08-13 23:00 ` sashiko-bot
2026-03-24 19:07 ` [PATCH v8 11/14] PCI: tegra194: Use DWC IP core version Manikanta Maddireddy
2026-08-13 23:18 ` sashiko-bot
2026-03-24 19:07 ` [PATCH v8 12/14] PCI: dwc: Apply ECRC workaround to DesignWare 5.00a as well Manikanta Maddireddy
2026-04-08 22:24 ` Bjorn Helgaas
2026-04-09 8:51 ` Manikanta Maddireddy
2026-04-09 18:45 ` Bjorn Helgaas
2026-04-10 6:32 ` Manikanta Maddireddy
2026-08-13 23:26 ` sashiko-bot
2026-03-24 19:07 ` [PATCH v8 13/14] PCI: tegra194: Disable L1.2 capability of Tegra234 EP Manikanta Maddireddy
2026-08-13 23:40 ` sashiko-bot
2026-03-24 19:07 ` [PATCH v8 14/14] PCI: tegra194: Fix CBB timeout caused by DBI access before core power-on Manikanta Maddireddy
2026-08-13 23:56 ` sashiko-bot
2026-04-04 15:10 ` [PATCH v8 00/14] Fixes to pcie-tegra194 driver Manivannan Sadhasivam
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260813224146.009B01F00A3A@smtp.kernel.org \
--to=sashiko-bot@kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=mmaddireddy@nvidia.com \
--cc=sashiko-reviews@lists.linux.dev \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.