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The UART is expected to be fully initialized by the bootloader. Signed-off-by: Wig Cheng --- xen/arch/arm/Kconfig.debug | 12 +++++++++ xen/arch/arm/arm64/debug-imx-uart.inc | 39 +++++++++++++++++++++++++++ 2 files changed, 51 insertions(+) create mode 100644 xen/arch/arm/arm64/debug-imx-uart.inc diff --git a/xen/arch/arm/Kconfig.debug b/xen/arch/arm/Kconfig.debug index 5a03b220ac..63a34b813a 100644 --- a/xen/arch/arm/Kconfig.debug +++ b/xen/arch/arm/Kconfig.debug @@ -44,6 +44,14 @@ choice Say Y here if you wish the early printk to direct their output to a i.MX LPUART. + config EARLY_UART_CHOICE_IMX_UART + select EARLY_UART_IMX_UART + depends on ARM_64 + bool "Early printk via i.MX UART" + help + Say Y here if you wish the early printk to direct their + output to the classic i.MX UART (i.MX8M family). + config EARLY_UART_CHOICE_LINFLEX select EARLY_UART_LINFLEX depends on ARM_64 @@ -97,6 +105,9 @@ config EARLY_UART_EXYNOS4210 config EARLY_UART_IMX_LPUART select EARLY_PRINTK bool +config EARLY_UART_IMX_UART + select EARLY_PRINTK + bool config EARLY_UART_LINFLEX select EARLY_PRINTK bool @@ -185,6 +196,7 @@ config EARLY_PRINTK_INC default "debug-cadence.inc" if EARLY_UART_CADENCE default "debug-exynos4210.inc" if EARLY_UART_EXYNOS4210 default "debug-imx-lpuart.inc" if EARLY_UART_IMX_LPUART + default "debug-imx-uart.inc" if EARLY_UART_IMX_UART default "debug-linflex.inc" if EARLY_UART_LINFLEX default "debug-meson.inc" if EARLY_UART_MESON default "debug-mvebu.inc" if EARLY_UART_MVEBU diff --git a/xen/arch/arm/arm64/debug-imx-uart.inc b/xen/arch/arm/arm64/debug-imx-uart.inc new file mode 100644 index 0000000000..80ac647f5e --- /dev/null +++ b/xen/arch/arm/arm64/debug-imx-uart.inc @@ -0,0 +1,39 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * xen/arch/arm/arm64/debug-imx-uart.inc + * + * Early printk for the classic i.MX UART IP (i.MX6/7/8M families). + * The UART is expected to be fully initialized by the bootloader. + * + * Copyright 2026 Open-EP (E-Paper) Community + */ + +#include + +/* + * Wait for the UART to be ready to transmit + * xb: register which contains the UART base address + * c: scratch register + */ +.macro early_uart_ready xb, c +1: + ldr w\c, [\xb, #UTS] /* <- Test register */ + tst w\c, #UTS_TXFULL /* Check TX FIFO full bit */ + bne 1b /* Wait until there is room */ +.endm + +/* + * UART transmit character + * xb: register which contains the UART base address + * wt: register which contains the character to transmit + */ +.macro early_uart_transmit xb, wt + str \wt, [\xb, #URTX0] /* -> Transmitter register */ +.endm + +/* + * Local variables: + * mode: ASM + * indent-tabs-mode: nil + * End: + */ -- 2.43.0