From: "Piórkowski, Piotr" <piotr.piorkowski@intel.com>
To: <intel-xe@lists.freedesktop.org>
Cc: "Piotr Piórkowski" <piotr.piorkowski@intel.com>,
"Michal Wajdeczko" <michal.wajdeczko@intel.com>,
"Ville Syrjälä" <ville.syrjala@linux.intel.com>,
"Maarten Lankhorst" <dev@lankhorst.se>
Subject: [PATCH v3 2/3] drm/xe/ggtt: Initialize GGTT pools by SR-IOV mode
Date: Mon, 17 Aug 2026 16:03:41 +0200 [thread overview]
Message-ID: <20260817140342.415803-3-piotr.piorkowski@intel.com> (raw)
In-Reply-To: <20260817140342.415803-1-piotr.piorkowski@intel.com>
From: Piotr Piórkowski <piotr.piorkowski@intel.com>
GGTT initialization currently uses the full available range for both the
usable and shareable pools, regardless of the SR-IOV mode. The range is
read from hardware on native and PF devices and assigned by GuC on VFs.
Let's separate range discovery from pool setup and initialize the pools
based on SR-IOV mode. Native and VF modes will use only the usable pool.
Shared PF mode will use both pools over the same full range, so they fully
overlap.
Signed-off-by: Piotr Piórkowski <piotr.piorkowski@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Maarten Lankhorst <dev@lankhorst.se>
---
drivers/gpu/drm/xe/xe_ggtt.c | 131 ++++++++++++++++++++++++++---------
1 file changed, 97 insertions(+), 34 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_ggtt.c b/drivers/gpu/drm/xe/xe_ggtt.c
index c7e1cb1b1ccb..84fcc62b1798 100644
--- a/drivers/gpu/drm/xe/xe_ggtt.c
+++ b/drivers/gpu/drm/xe/xe_ggtt.c
@@ -365,8 +365,8 @@ static const struct xe_ggtt_pt_ops xelpg_pt_wa_ops = {
.ggtt_get_pte = xe_ggtt_get_pte,
};
-static void __xe_ggtt_init_early(struct xe_ggtt *ggtt, u64 start, u64 usable_size,
- u64 shareable_size)
+static void ggtt_init_ranges(struct xe_ggtt *ggtt, u64 start, u64 usable_size,
+ u64 shareable_size)
{
struct xe_gt *gt = ggtt->tile->primary_gt;
@@ -386,10 +386,87 @@ static void __xe_ggtt_init_early(struct xe_ggtt *ggtt, u64 start, u64 usable_siz
drm_mm_init(&ggtt->mm, 0, ggtt->hw_size);
}
+static int ggtt_get_range_from_hw(struct xe_ggtt *ggtt, u64 *start, u64 *size)
+{
+ struct xe_device *xe = tile_to_xe(ggtt->tile);
+ struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
+ unsigned int gsm_size;
+
+ if (GRAPHICS_VERx100(xe) >= 1250)
+ gsm_size = SZ_8M; /* GGTT is expected to be 4GiB */
+ else
+ gsm_size = probe_gsm_size(pdev);
+
+ if (!gsm_size) {
+ xe_tile_err(ggtt->tile, "Hardware reported no preallocated GSM\n");
+ return -ENOMEM;
+ }
+
+ *start = xe_wopcm_size(xe);
+ *size = (gsm_size / 8) * (u64)XE_PAGE_SIZE - *start;
+
+ return 0;
+}
+
+static int ggtt_get_range_from_guc(struct xe_ggtt *ggtt, u64 *start, u64 *size)
+{
+ struct xe_device *xe = tile_to_xe(ggtt->tile);
+ u64 wopcm = xe_wopcm_size(xe);
+
+ *start = xe_tile_sriov_vf_ggtt_base(ggtt->tile);
+ *size = xe_tile_sriov_vf_ggtt(ggtt->tile);
+
+ if (*start < wopcm || *start + *size > GUC_GGTT_TOP) {
+ xe_tile_err(ggtt->tile, "Invalid GGTT configuration: %#llx-%#llx\n",
+ *start, *start + *size - 1);
+ return -ERANGE;
+ }
+
+ return 0;
+}
+
+static int ggtt_read_available_range(struct xe_ggtt *ggtt, u64 *start, u64 *size)
+{
+ struct xe_device *xe = tile_to_xe(ggtt->tile);
+ int err;
+
+ if (IS_SRIOV_VF(xe))
+ err = ggtt_get_range_from_guc(ggtt, start, size);
+ else
+ err = ggtt_get_range_from_hw(ggtt, start, size);
+ if (err)
+ return err;
+
+ if (*start + *size > GUC_GGTT_TOP)
+ *size = GUC_GGTT_TOP - *start;
+
+ return 0;
+}
+
+static void ggtt_init_native(struct xe_ggtt *ggtt, u64 start, u64 size)
+{
+ ggtt_init_ranges(ggtt, start, size, 0);
+}
+
+static void ggtt_init_shared(struct xe_ggtt *ggtt, u64 start, u64 size)
+{
+ ggtt_init_ranges(ggtt, start, size, size);
+}
+
+static void ggtt_init_generic(struct xe_ggtt *ggtt, u64 start, u64 size)
+{
+ struct xe_device *xe = tile_to_xe(ggtt->tile);
+
+ if (!IS_SRIOV_PF(xe))
+ ggtt_init_native(ggtt, start, size);
+ else
+ ggtt_init_shared(ggtt, start, size);
+}
+
int xe_ggtt_init_kunit(struct xe_ggtt *ggtt, u32 start, u32 size)
{
ggtt->hw_size = size;
- __xe_ggtt_init_early(ggtt, start, size, 0);
+ ggtt_init_ranges(ggtt, start, size, 0);
return 0;
}
EXPORT_SYMBOL_IF_KUNIT(xe_ggtt_init_kunit);
@@ -417,43 +494,19 @@ static void dev_fini_ggtt(void *arg)
int xe_ggtt_init_early(struct xe_ggtt *ggtt)
{
struct xe_device *xe = tile_to_xe(ggtt->tile);
- struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
- unsigned int gsm_size;
- u64 ggtt_start, wopcm = xe_wopcm_size(xe), ggtt_size;
+ u64 ggtt_start, ggtt_size;
int err;
- if (!IS_SRIOV_VF(xe)) {
- if (GRAPHICS_VERx100(xe) >= 1250)
- gsm_size = SZ_8M; /* GGTT is expected to be 4GiB */
- else
- gsm_size = probe_gsm_size(pdev);
- if (gsm_size == 0) {
- xe_tile_err(ggtt->tile, "Hardware reported no preallocated GSM\n");
- return -ENOMEM;
- }
- ggtt_start = wopcm;
- ggtt_size = (gsm_size / 8) * (u64)XE_PAGE_SIZE - ggtt_start;
- } else {
- ggtt_start = xe_tile_sriov_vf_ggtt_base(ggtt->tile);
- ggtt_size = xe_tile_sriov_vf_ggtt(ggtt->tile);
-
- if (ggtt_start < wopcm ||
- ggtt_start + ggtt_size > GUC_GGTT_TOP) {
- xe_tile_err(ggtt->tile, "Invalid GGTT configuration: %#llx-%#llx\n",
- ggtt_start, ggtt_start + ggtt_size - 1);
- return -ERANGE;
- }
- }
+ err = ggtt_read_available_range(ggtt, &ggtt_start, &ggtt_size);
+ if (err)
+ return err;
+
+ ggtt->hw_size = ggtt_size;
ggtt->gsm = ggtt->tile->mmio.regs + SZ_8M;
if (IS_DGFX(xe) && xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K)
ggtt->flags |= XE_GGTT_FLAGS_64K;
- if (ggtt_size + ggtt_start > GUC_GGTT_TOP)
- ggtt_size = GUC_GGTT_TOP - ggtt_start;
-
- ggtt->hw_size = ggtt_size;
-
if (GRAPHICS_VERx100(xe) >= 1270)
ggtt->pt_ops =
(ggtt->tile->media_gt && XE_GT_WA(ggtt->tile->media_gt, 22019338487)) ||
@@ -466,7 +519,17 @@ int xe_ggtt_init_early(struct xe_ggtt *ggtt)
if (!ggtt->wq)
return -ENOMEM;
- __xe_ggtt_init_early(ggtt, ggtt_start, ggtt_size, ggtt_size);
+ ggtt_init_generic(ggtt, ggtt_start, ggtt_size);
+ xe_tile_info(ggtt->tile, "GGTT usable %#llx-%#llx = %lluK\n",
+ ggtt->start, ggtt->start + ggtt->size - 1,
+ ggtt->size / SZ_1K);
+#ifdef CONFIG_PCI_IOV
+ if (IS_SRIOV_PF(xe))
+ xe_tile_info(ggtt->tile, "GGTT shareable %#llx-%#llx = %lluK\n",
+ ggtt->start + ggtt->shareable.start,
+ ggtt->start + ggtt->shareable.start + ggtt->shareable.size - 1,
+ ggtt->shareable.size / SZ_1K);
+#endif
err = drmm_add_action_or_reset(&xe->drm, ggtt_fini_early, ggtt);
if (err)
--
2.34.1
next prev parent reply other threads:[~2026-08-17 14:04 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-17 14:03 [PATCH v3 0/3] Separate GGTT pools for submissions and VFs provisioning Piórkowski, Piotr
2026-08-17 14:03 ` [PATCH v3 1/3] drm/xe/ggtt: Split GGTT into usable and shareable pools Piórkowski, Piotr
2026-08-17 14:18 ` sashiko-bot
2026-08-17 14:03 ` Piórkowski, Piotr [this message]
2026-08-17 14:03 ` [PATCH v3 3/3] drm/xe/ggtt: Add KUnit tests for " Piórkowski, Piotr
2026-08-17 14:15 ` ✗ CI.checkpatch: warning for Separate GGTT pools for submissions and VFs provisioning (rev3) Patchwork
2026-08-17 14:18 ` ✓ CI.KUnit: success " Patchwork
2026-08-17 15:18 ` ✓ Xe.CI.BAT: " Patchwork
2026-08-17 17:37 ` ✗ Xe.CI.FULL: failure " Patchwork
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