From: Jishnu Warrier <jishnuvw@linux.ibm.com>
To: qemu-devel@nongnu.org
Cc: npiggin@gmail.com, philmd@linaro.org, farosas@suse.de,
akihiko.odaki@daynix.com, mst@redhat.com,
marcel.apfelbaum@gmail.com, david@gibson.dropbear.id.au,
adityag@linux.ibm.com, harshpb@linux.ibm.com,
amachhiw@linux.ibm.com
Subject: [PATCH v6 02/10] tests/qtest: Fix virtio msix message endianness
Date: Tue, 18 Aug 2026 00:25:32 +0530 [thread overview]
Message-ID: <20260817185539.376740-3-jishnuvw@linux.ibm.com> (raw)
In-Reply-To: <20260817185539.376740-1-jishnuvw@linux.ibm.com>
From: Nicholas Piggin <npiggin@gmail.com>
msix messages are written to memory in little-endian order, so they
should not be byteswapped depending on target endianness, but read
as le and converted to host endian by the qtest.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Fabiano Rosas <farosas@suse.de>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
tests/qtest/libqos/virtio-pci-modern.c | 4 +++-
tests/qtest/libqos/virtio-pci.c | 6 ++++--
2 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/tests/qtest/libqos/virtio-pci-modern.c b/tests/qtest/libqos/virtio-pci-modern.c
index f31b3be6..5dae41e6 100644
--- a/tests/qtest/libqos/virtio-pci-modern.c
+++ b/tests/qtest/libqos/virtio-pci-modern.c
@@ -8,6 +8,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/bswap.h"
#include "standard-headers/linux/pci_regs.h"
#include "standard-headers/linux/virtio_pci.h"
#include "standard-headers/linux/virtio_config.h"
@@ -136,7 +137,8 @@ static bool get_msix_status(QVirtioPCIDevice *dev, uint32_t msix_entry,
return qpci_msix_pending(dev->pdev, msix_entry);
}
- data = qtest_readl(dev->pdev->bus->qts, msix_addr);
+ qtest_memread(dev->pdev->bus->qts, msix_addr, &data, 4);
+ data = le32_to_cpu(data);
if (data == 0) {
return false;
}
diff --git a/tests/qtest/libqos/virtio-pci.c b/tests/qtest/libqos/virtio-pci.c
index 102e45b5..76ea1f45 100644
--- a/tests/qtest/libqos/virtio-pci.c
+++ b/tests/qtest/libqos/virtio-pci.c
@@ -131,7 +131,8 @@ static bool qvirtio_pci_get_queue_isr_status(QVirtioDevice *d, QVirtQueue *vq)
/* No ISR checking should be done if masked, but read anyway */
return qpci_msix_pending(dev->pdev, vqpci->msix_entry);
} else {
- data = qtest_readl(dev->pdev->bus->qts, vqpci->msix_addr);
+ qtest_memread(dev->pdev->bus->qts, vqpci->msix_addr, &data, 4);
+ data = le32_to_cpu(data);
if (data == 0) {
return false;
}
@@ -156,7 +157,8 @@ static bool qvirtio_pci_get_config_isr_status(QVirtioDevice *d)
/* No ISR checking should be done if masked, but read anyway */
return qpci_msix_pending(dev->pdev, dev->config_msix_entry);
} else {
- data = qtest_readl(dev->pdev->bus->qts, dev->config_msix_addr);
+ qtest_memread(dev->pdev->bus->qts, dev->config_msix_addr, &data, 4);
+ data = le32_to_cpu(data);
if (data == 0) {
return false;
}
--
2.55.0
next prev parent reply other threads:[~2026-08-17 18:56 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-17 18:55 [PATCH v6 00/10] tests/qtest: pci and MSI-X fixes Jishnu Warrier
2026-08-17 18:55 ` [PATCH v6 01/10] tests/qtest: Enforce zero for the "un-fired" msix message value Jishnu Warrier
2026-08-17 18:55 ` Jishnu Warrier [this message]
2026-08-17 18:55 ` [PATCH v6 03/10] tests/qtest: Add libqos function for testing msix interrupt status Jishnu Warrier
2026-08-17 18:55 ` [PATCH v6 04/10] tests/qtest: Enable spapr dma with linear iommu map Jishnu Warrier
2026-08-18 19:50 ` Fabiano Rosas
2026-08-17 18:55 ` [PATCH v6 05/10] tests/qtest/ahci: unmap pci bar before reusing device Jishnu Warrier
2026-08-17 18:55 ` [PATCH v6 06/10] tests/qtest/ahci: don't unmap pci bar if it wasn't mapped Jishnu Warrier
2026-08-17 18:55 ` [PATCH v6 07/10] tests/qtest/libquos/pci: Add migration fixup helper for pci devices Jishnu Warrier
2026-08-17 18:55 ` [PATCH v6 08/10] qtest/libqos/pci: Enforce balanced iomap/unmap Jishnu Warrier
2026-08-17 18:55 ` [PATCH v6 09/10] qtest/libqos/pci: Fix qpci_msix_enable sharing bar0 Jishnu Warrier
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