From: sashiko-bot@kernel.org
To: "Long Zhao" <longzhao@ambarella.com>
Cc: devicetree@vger.kernel.org, linux-clk@vger.kernel.org,
mfd@lists.linux.dev, robh@kernel.org, conor+dt@kernel.org,
lee@kernel.org
Subject: Re: [PATCH v5 07/12] clk: ambarella: add CV75 CCU driver
Date: Tue, 18 Aug 2026 10:46:06 +0000 [thread overview]
Message-ID: <20260818104606.8A5AD1F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260818-cv75-v5-v5-7-7bbb12f0360f@ambarella.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] Casting away `const` to modify a `const`-qualified array member via `memcpy` invokes undefined behavior.
--
--- Patch [7]: [PATCH v5 07/12] clk: ambarella: add CV75 CCU driver ---
commit 477493a502606783178c884c88d17f74d16fc602
Author: Long Zhao <longzhao@ambarella.com>
clk: ambarella: add CV75 CCU driver
Add the Ambarella CV75 clock driver covering the core PLL and the UART0
/ AHB / APB clocks needed for early console bring-up.
> diff --git a/drivers/clk/ambarella/ccu-cv75.c b/drivers/clk/ambarella/ccu-cv75.c
> index 0000000000000..d682da3cf28d3
> --- /dev/null
> +++ b/drivers/clk/ambarella/ccu-cv75.c
[ ... ]
> +static struct clk_hw *amb_cv75_register_clk(struct device *dev,
> + struct amb_ccu *ccu,
> + const struct amb_cv75_clk_desc *desc,
> + struct clk_hw *osc,
> + struct clk_hw *dummy)
> +{
> + struct amb_pll_desc pll_desc;
> + struct clk_hw *parent;
> +
> + switch (desc->type) {
[ ... ]
> + case AMB_CV75_CLK_PLL:
> + parent = amb_cv75_get_parent(ccu, osc, dummy, desc->parent);
> + if (IS_ERR(parent))
> + return parent;
> +
> + pll_desc.name = desc->name;
> + pll_desc.parent = parent;
> + memcpy((void *)pll_desc.reg_offset, desc->pll.reg_offset,
> + sizeof(pll_desc.reg_offset));
[Severity: Low]
Is it safe to cast away the const qualifier here?
The reg_offset array in struct amb_pll_desc is defined as const u32. Modifying
a const-qualified object through a non-const pointer like this results in
undefined behavior under C language rules.
Could this be refactored so that the struct initialization doesn't require
casting away const?
> + pll_desc.soc_data = desc->pll.soc_data;
> + pll_desc.frac_mode = false;
> +
> + return amb_pll_register(dev, ccu->map, &pll_desc);
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260818-cv75-v5-v5-0-7bbb12f0360f@ambarella.com?part=7
next prev parent reply other threads:[~2026-08-18 10:46 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-18 10:31 [PATCH v5 00/12] Ambarella CV75 SoC minimal bring-up Long Zhao via B4 Relay
2026-08-18 10:31 ` Long Zhao
2026-08-18 10:31 ` [PATCH v5 01/12] dt-bindings: arm: add Ambarella CV75 platforms Long Zhao via B4 Relay
2026-08-18 10:31 ` Long Zhao
2026-08-18 10:35 ` sashiko-bot
2026-08-18 10:31 ` [PATCH v5 02/12] dt-bindings: mfd: syscon: add Ambarella CV75 secure scratchpad Long Zhao via B4 Relay
2026-08-18 10:31 ` Long Zhao
2026-08-18 10:37 ` sashiko-bot
2026-08-18 10:31 ` [PATCH v5 03/12] dt-bindings: clock: add Ambarella CV75 RCT Long Zhao via B4 Relay
2026-08-18 10:31 ` Long Zhao
2026-08-18 10:36 ` sashiko-bot
2026-08-18 10:31 ` [PATCH v5 04/12] dt-bindings: pinctrl: add Ambarella CV75 pinctrl Long Zhao via B4 Relay
2026-08-18 10:31 ` Long Zhao
2026-08-18 10:39 ` sashiko-bot
2026-08-18 10:31 ` [PATCH v5 05/12] dt-bindings: gpio: pl061: add Ambarella CV75 variant Long Zhao via B4 Relay
2026-08-18 10:31 ` Long Zhao
2026-08-18 10:40 ` sashiko-bot
2026-08-18 10:31 ` [PATCH v5 06/12] dt-bindings: serial: add Ambarella CV75 UART Long Zhao via B4 Relay
2026-08-18 10:31 ` Long Zhao
2026-08-18 10:39 ` sashiko-bot
2026-08-18 10:31 ` [PATCH v5 07/12] clk: ambarella: add CV75 CCU driver Long Zhao via B4 Relay
2026-08-18 10:31 ` Long Zhao
2026-08-18 10:46 ` sashiko-bot [this message]
2026-08-18 10:31 ` [PATCH v5 08/12] gpio: pl061: add Ambarella CV75 register layout variant Long Zhao via B4 Relay
2026-08-18 10:31 ` Long Zhao
2026-08-18 10:45 ` sashiko-bot
2026-08-18 14:11 ` Andy Shevchenko
2026-08-18 10:31 ` [PATCH v5 09/12] pinctrl: ambarella: add CV75 pin controller Long Zhao via B4 Relay
2026-08-18 10:31 ` Long Zhao
2026-08-18 10:48 ` sashiko-bot
2026-08-18 10:31 ` [PATCH v5 10/12] serial: 8250: add Ambarella UART driver Long Zhao via B4 Relay
2026-08-18 10:31 ` Long Zhao
2026-08-18 10:50 ` sashiko-bot
2026-08-18 14:17 ` Andy Shevchenko
2026-08-18 10:31 ` [PATCH v5 11/12] arm64: ambarella: add ARCH_AMBARELLA and CV75 EVK DT Long Zhao via B4 Relay
2026-08-18 10:31 ` Long Zhao
2026-08-18 10:49 ` sashiko-bot
2026-08-18 10:31 ` [PATCH v5 12/12] MAINTAINERS: add ARM/AMBARELLA SoC support Long Zhao via B4 Relay
2026-08-18 10:31 ` Long Zhao
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260818104606.8A5AD1F000E9@smtp.kernel.org \
--to=sashiko-bot@kernel.org \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=lee@kernel.org \
--cc=linux-clk@vger.kernel.org \
--cc=longzhao@ambarella.com \
--cc=mfd@lists.linux.dev \
--cc=robh@kernel.org \
--cc=sashiko-reviews@lists.linux.dev \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.