Re: [PATCH v4 1/2] dmaengine: dw-edma: Enable Chan Separation via VSEC

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] The parsed channel separation size (`ch_space_sz`) is extracted from the PCIe VSEC but never read or passed to the DMA core, resulting in dead code and an incomplete feature.
--

--- Patch [1]: [PATCH v4 1/2] dmaengine: dw-edma: Enable Chan Separation via VSEC ---
commit b605eb99c5a71a0d4b5d7b6b4068f555cc7fee6e
Author: Devendra K Verma <devverma@amd.com>
Subject: dmaengine: dw-edma: Enable Chan Separation via VSEC

This commit extracts the HDMA IP channel separation size from the PCIe VSEC
capabilities. It then stores this parsed size in the driver data structure.

> diff --git a/drivers/dma/dw-edma/dw-edma-pcie.c b/drivers/dma/dw-edma/dw-edma-pcie.c
> index 791c46e8ae4c4..f287879b2cb9e 100644
> --- a/drivers/dma/dw-edma/dw-edma-pcie.c
> +++ b/drivers/dma/dw-edma/dw-edma-pcie.c
[ ... ]
> @@ -279,6 +289,10 @@ static void dw_edma_pcie_get_xilinx_dma_data(struct pci_dev *pdev,
>  	pdata->mf = map;
>  	pdata->rg.bar = FIELD_GET(DW_PCIE_XILINX_MDB_VSEC_DMA_BAR, val);
>  
> +	if (pdev->device == PCI_DEVICE_ID_XILINX_B00F)
> +		pdata->ch_space_sz = dw_edma_get_ch_space_sz
> +					(FIELD_GET(DW_PCIE_XILINX_CPM6_VSEC_CH_SEP, val));

[Severity: Medium]
Is the extracted ch_space_sz value actually used anywhere after it is stored?

The commit message states this enables configurable channel separation, but it
appears that pdata->ch_space_sz is only saved in the driver-private structure
in dw_edma_pcie_get_xilinx_dma_data() and never passed to the DMA core.

The patch changelog notes that the first patch of the original series was
dropped after review. Does this omission leave the core IP driver using its
hardcoded 256-byte layout, making this extracted value functionally inert dead
code?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260819070947.4080389-1-devverma@amd.com?part=1