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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-482b145153fsm6322181f8f.12.2026.08.19.07.58.01 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 19 Aug 2026 07:58:01 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Paolo Bonzini , Daniel Henrique Barboza , Peter Maydell , Richard Henderson , Pierrick Bouvier Subject: [PATCH 10/11] target/i386: Convert cpu_exec_halt() to transition_halt_to_exec() Date: Wed, 19 Aug 2026 16:56:48 +0200 Message-ID: <20260819145649.23439-11-philmd@oss.qualcomm.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260819145649.23439-1-philmd@oss.qualcomm.com> References: <20260819145649.23439-1-philmd@oss.qualcomm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-GUID: gRIj9VLj9KQfDzSoXD-H57VAVXcTvECk X-Proofpoint-ORIG-GUID: gRIj9VLj9KQfDzSoXD-H57VAVXcTvECk X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODE5MDExNiBTYWx0ZWRfX6I3MAc4GK9xC cEgbRGlSTvyv+tWbSRiH7vS+Ln++VRbFwDW1fmfqm21m+K7esXLZgv9wqEH2/8ImmM+NU3zDTrE APAFw4Mvx18Ky5t5hr5b2LvVS7HVTI8N7SliuIjehyVBZFtzj/XzWWbtDDiCZusl4CDWhVihXuK W6wfnxBoLkIsfR7MRs5G/IL7t6pd9oxxf9yjRn0Lx+pCV9ffvom7zRJL/wUWAg7oe4LTpXjxlDc qifj7r4rqOVuv9+fY9KAz52CKIsIQI4CPA1pkCotGz1MTspb/qx9B10dxDU7TR/vwl+h+GpTrXf UDGS/+XPqFqk7RCYd8qeWnRBejgZjyAVx/60xdq24E2UgbG2TnfR9DpTcjrn0IU+RxvkrYQTo09 VPY9QJfI6rTrjQqlx4jGxSenI/v1kw+ZIDpInBcWUPcSLoE9MGo0LdV4YlqNqSrOC6dzON0uUKA IbajTgYoeBoHyI86slQ== X-Proofpoint-Spam-Info: AW1haW4tMjYwODE5MDExNiBTYWx0ZWRfX9fkjaazVtAp6 jMHMOZxXAvQNPPymFl12w2NEHnbos5R3LzEfkTVHbdUIg4WhqDyyV9ZXSC1tMdeKC8489sjbIa+ 317KdEbJxacnbbQqbg2kKqfRnyZCGf0= X-Authority-Analysis: v=2.4 cv=fvfsol4f c=1 sm=1 tr=0 ts=6a85c47b cx=c_pps a=hnmNkyzTK/kJ09Xio7VxxA==:117 a=4s3hRJSeHn4rkQlkrse1kQ==:17 a=IkcTkHD0fZMA:10 a=Sv0fKeRqtYgA:10 a=M51BFTxLslgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=gowsoOTTUOVcmtlkKump:22 a=EUspDBNiAAAA:8 a=5HqjihXlECL5oxfrbloA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=O8hF6Hzn-FEA:10 a=PEH46H7Ffwr30OY-TuGO:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-19_04,2026-08-19_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 clxscore=1015 impostorscore=0 malwarescore=0 lowpriorityscore=0 bulkscore=0 spamscore=0 priorityscore=1501 suspectscore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608190116 Received-SPF: pass client-ip=205.220.180.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org x86_cpu_exec_halt() now merely checks cpu_has_work() and conditionally call x86_cpu_transition_halt_to_exec(), which is now the generic flow in cpu_has_work_after_processing_async_events(). Register both process_async_events and transition_halt_to_exec handlers to use the generic target-agnostic flow, and remove the x86_cpu_exec_halt() wrapper. Signed-off-by: Philippe Mathieu-Daudé --- target/i386/tcg/helper-tcg.h | 1 - target/i386/tcg/system/seg_helper.c | 11 ----------- target/i386/tcg/tcg-cpu.c | 3 ++- 3 files changed, 2 insertions(+), 13 deletions(-) diff --git a/target/i386/tcg/helper-tcg.h b/target/i386/tcg/helper-tcg.h index 65819670493..d224cb3c1c7 100644 --- a/target/i386/tcg/helper-tcg.h +++ b/target/i386/tcg/helper-tcg.h @@ -38,7 +38,6 @@ void x86_cpu_do_interrupt(CPUState *cpu); #ifndef CONFIG_USER_ONLY void x86_cpu_process_async_events(CPUState *cpu); -bool x86_cpu_exec_halt(CPUState *cpu); void x86_cpu_transition_halt_to_exec(CPUState *cpu); bool x86_need_replay_interrupt(int interrupt_request); bool x86_cpu_exec_interrupt(CPUState *cpu, int int_req); diff --git a/target/i386/tcg/system/seg_helper.c b/target/i386/tcg/system/seg_helper.c index 9b2adcca76c..7a3f14a255e 100644 --- a/target/i386/tcg/system/seg_helper.c +++ b/target/i386/tcg/system/seg_helper.c @@ -154,17 +154,6 @@ void x86_cpu_transition_halt_to_exec(CPUState *cpu) } } -bool x86_cpu_exec_halt(CPUState *cpu) -{ - if (!cpu_has_work(cpu)) { - return false; - } - - x86_cpu_transition_halt_to_exec(cpu); - - return true; -} - bool x86_need_replay_interrupt(int interrupt_request) { /* diff --git a/target/i386/tcg/tcg-cpu.c b/target/i386/tcg/tcg-cpu.c index 6f5dc06b3b9..e4fc212aca5 100644 --- a/target/i386/tcg/tcg-cpu.c +++ b/target/i386/tcg/tcg-cpu.c @@ -180,7 +180,8 @@ const TCGCPUOps x86_tcg_ops = { .tlb_fill = x86_cpu_tlb_fill, .pointer_wrap = x86_pointer_wrap, .do_interrupt = x86_cpu_do_interrupt, - .cpu_exec_halt = x86_cpu_exec_halt, + .process_async_events = x86_cpu_process_async_events, + .transition_halt_to_exec = x86_cpu_transition_halt_to_exec, .cpu_exec_interrupt = x86_cpu_exec_interrupt, .cpu_exec_reset = x86_cpu_exec_reset, .do_unaligned_access = x86_cpu_do_unaligned_access, -- 2.53.0