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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-482b1441c78sm6324437f8f.2.2026.08.19.07.57.25 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 19 Aug 2026 07:57:25 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Paolo Bonzini , Daniel Henrique Barboza , Peter Maydell , Richard Henderson , Pierrick Bouvier Subject: [PATCH 05/11] accel/tcg: Introduce .process_async_events and .transition_halt_to_exec Date: Wed, 19 Aug 2026 16:56:43 +0200 Message-ID: <20260819145649.23439-6-philmd@oss.qualcomm.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260819145649.23439-1-philmd@oss.qualcomm.com> References: <20260819145649.23439-1-philmd@oss.qualcomm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-GUID: iIjRKu0lErtjqJ3V2QH5E7ggx7FXIYXy X-Proofpoint-ORIG-GUID: iIjRKu0lErtjqJ3V2QH5E7ggx7FXIYXy X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODE5MDExNiBTYWx0ZWRfXxab8jZsDHwx1 e8TaAIyr8Zolq2hcFOQta+JIQSts7MvyK5BmjJNb8jMJVYZHxrhRUHdrVCLd39c3FOpTo7zDbAx eCDGw7qCrUGQRmKvCfyJYIpLAjurVf8b0zsAU2uQ/xoknFeY+o1DtOyejJNKtqJgy9UTw7HFbwd 9M2qhmzeQdq41DjTTRmd4VYCr15goQf/Rg9TediYaRpdmf6xLm6mL30ydF14mLvISp4Xc7vb7Uh bgnR52ec4BWmmYvJv1zqmfaPCFadw5ZNCI3xJGV5MCfklvcOTvX7E8hQO1pV1U52HBNFanTa0Rv QZgVaWE/1CkpAngVzt0O7AExIW9yKZrCpgh7r5m55WTchbcU3UH6niXq9uUQBlm1oOvN5l0f/tJ 0zVX0DExdr4q2qbuhephFjBZRMuafPyQJ0UjZWvXf8+JieJ7AI+boq4wgpdHbQbG5itNytCfXpS I4Zizbxm0yJj3zmtUiw== X-Proofpoint-Spam-Info: AW1haW4tMjYwODE5MDExNiBTYWx0ZWRfXwBsapw1/FwYt Sb2Rqco4BsqlL3bGvKO0n9FSkFAoDti+444J5/YKyGNDc+lE+Rdo6gh++CDxswVlv9xMPdO2BKF YGrO31ZhM19zcRrg7xTC5BvJrY1JsLw= X-Authority-Analysis: v=2.4 cv=fvfsol4f c=1 sm=1 tr=0 ts=6a85c457 cx=c_pps a=hnmNkyzTK/kJ09Xio7VxxA==:117 a=4s3hRJSeHn4rkQlkrse1kQ==:17 a=IkcTkHD0fZMA:10 a=Sv0fKeRqtYgA:10 a=M51BFTxLslgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=gowsoOTTUOVcmtlkKump:22 a=20KFwNOVAAAA:8 a=EUspDBNiAAAA:8 a=gtMiE9pvqgAortkEK9IA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=O8hF6Hzn-FEA:10 a=PEH46H7Ffwr30OY-TuGO:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-19_04,2026-08-19_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 clxscore=1015 impostorscore=0 malwarescore=0 lowpriorityscore=0 bulkscore=0 spamscore=0 priorityscore=1501 suspectscore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608190116 Received-SPF: pass client-ip=205.220.180.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Decompose the halt-to-execution transition into distinct steps: - process_async_events() called first to handle target-specific asynchronous events, - transition_halt_to_exec() called after a halted CPU has detected pending work and is about to resume execution. Either callback is optional; targets that don't implement them fall back to the existing cpu_exec_halt() callback for backward compatibility. cpu_has_work_after_processing_async_events() orchestrates these callbacks: process async events, check for work, transition from halt, and clear the halted flag. Inspired-by: Paolo Bonzini Signed-off-by: Philippe Mathieu-Daudé --- include/accel/tcg/cpu-ops.h | 17 ++++++++++++++++- accel/tcg/cpu-exec.c | 21 +++++++++++++++++---- 2 files changed, 33 insertions(+), 5 deletions(-) diff --git a/include/accel/tcg/cpu-ops.h b/include/accel/tcg/cpu-ops.h index 3ff6e6810e0..16c19da997d 100644 --- a/include/accel/tcg/cpu-ops.h +++ b/include/accel/tcg/cpu-ops.h @@ -169,6 +169,20 @@ struct TCGCPUOps { */ vaddr (*untagged_addr)(CPUState *cs, vaddr addr); #else + /** + * @process_async_events: Process target-specific asynchronous CPU events. + * + * Called at the start of cpu_exec() to handle target-specific event + * processing before instruction execution begins. + */ + void (*process_async_events)(CPUState *cpu); + /** + * @transition_halt_to_exec: Prepare CPU state when exiting halt. + * + * Called after a halted CPU has detected pending work and is about to + * resume execution. Target-specific cleanup and state synchronization. + */ + void (*transition_halt_to_exec)(CPUState *cpu); /** @do_interrupt: Callback for interrupt handling. */ void (*do_interrupt)(CPUState *cpu); /** @cpu_exec_interrupt: Callback for processing interrupts in cpu_exec */ @@ -185,7 +199,8 @@ struct TCGCPUOps { * if it should remain in the halted state. (This should generally * be the same value that cpu_has_work() would return.) * - * This method must be provided. If the target does not need to + * Either %transition_halt_to_exec() or this method must be provided. + * If the target does not need to * do anything special for halt, the same function used for its * SysemuCPUOps::has_work method can be used here, as they have the * same function signature. diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 1a942664895..54561ed31c1 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -48,6 +48,7 @@ #include "internal-common.h" #if !defined(CONFIG_USER_ONLY) #include "accel/tcg/iommu.h" +#include "hw/core/sysemu-cpu-ops.h" #endif /* -icount align implementation. */ @@ -657,10 +658,22 @@ static inline void tb_add_jump(TranslationBlock *tb, int n, static bool cpu_has_work_after_processing_async_events(CPUState *cpu) { const TCGCPUOps *tcg_ops = cpu->cc->tcg_ops; - bool leave_halt = tcg_ops->cpu_exec_halt(cpu); - if (!leave_halt) { - return false; + if (tcg_ops->transition_halt_to_exec) { + assert(!tcg_ops->cpu_exec_halt); + if (tcg_ops->process_async_events) { + tcg_ops->process_async_events(cpu); + } + if (!cpu_has_work(cpu)) { + return false; + } + tcg_ops->transition_halt_to_exec(cpu); + } else { + assert(!tcg_ops->process_async_events); + assert(cpu->cc->sysemu_ops->has_work == tcg_ops->cpu_exec_halt); + if (!tcg_ops->cpu_exec_halt(cpu)) { + return false; + } } cpu->halted = 0; /* allow execution */ @@ -1059,7 +1072,7 @@ bool tcg_exec_realizefn(CPUState *cpu, Error **errp) /* Check mandatory TCGCPUOps handlers */ const TCGCPUOps *tcg_ops = cpu->cc->tcg_ops; #ifndef CONFIG_USER_ONLY - assert(tcg_ops->cpu_exec_halt); + assert(tcg_ops->cpu_exec_halt || tcg_ops->transition_halt_to_exec); assert(tcg_ops->cpu_exec_interrupt); assert(tcg_ops->cpu_exec_reset); assert(tcg_ops->pointer_wrap); -- 2.53.0