Re: [PATCH v2] PCI: qcom: Block accesses to downstream devices on link down

[sashiko-bot@kernel.org]

> After a PCIe link goes down, software may still access the BAR (MMIO)
> space or configuration space of devices behind that link before recovery
> has run. As the link is down, these accesses never complete, resulting in
> a storm of Completion Timeout AERs.
> 
> Use the controller's ECAM blocker to drop these accesses to the PCIe
> address space as soon as the link-down interrupt fires, so that Completion
> Timeout AERs are reduced. The blocked range covers the entire address
> space (base 0x0, all-ones limit), since the Root Port's own DBI/iATU
> register space remains accessible regardless.
> 
> The range is programmed once in the host init path, since the range
> registers are wiped by BCR reset. This leaves only the ECAM_BLOCKER_EN
> bit to be flipped from the link-down IRQ handler, so the blocker can be
> armed with a single fast register write for immediate effect.
> [ ... ]
> with a Root Port reset triggered independently through AER, which
> reprograms PARF_SYS_CTRL as part of reinitializing the controller.
> Serialize these with a per-controller mutex.
> 
> Signed-off-by: Qiang Yu <qiang.yu@oss.qualcomm.com>

Sashiko has reviewed this patch and found no issues. It looks great!

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Sashiko AI review · https://sashiko.dev/#/patchset/20260819-ecam_blocker-v2-1-e7a8fdc1c5cb@oss.qualcomm.com?part=1