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Lunev" To: qemu-devel@nongnu.org Cc: qemu-block@nongnu.org, "Denis V. Lunev" , John Snow , Peter Maydell , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH v2 04/17] tests/qtest/ahci: cover the sector count of INITIALIZE DEVICE PARAMETERS Date: Thu, 20 Aug 2026 12:08:31 +0200 Message-ID: <20260820100844.411717-5-den@openvz.org> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260820100844.411717-1-den@openvz.org> References: <20260820100844.411717-1-den@openvz.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::42a; envelope-from=den@openvz.org; helo=mail-wr1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Denis V. Lunev The sector count register of a legacy port is eight bits wide, so ide-test can only reach the lower end of the range the command has to refuse. A register FIS carries a 16 bit count, which leaves AHCI as the only way to ask for a translation of 256 sectors per logical track or more. Ask for 0, 256 and 65535 sectors and expect each to be aborted, then ask for 32 and expect it to be accepted, so that the check cannot pass by refusing everything. Cc: John Snow Cc: Peter Maydell Cc: Philippe Mathieu-Daudé Signed-off-by: Denis V. Lunev --- tests/qtest/ahci-test.c | 40 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/tests/qtest/ahci-test.c b/tests/qtest/ahci-test.c index 71d23fe56a..30d7005626 100644 --- a/tests/qtest/ahci-test.c +++ b/tests/qtest/ahci-test.c @@ -905,6 +905,30 @@ static void ahci_test_flush(AHCIQState *ahci) ahci_test_nondata(ahci, CMD_FLUSH_CACHE); } +static void ahci_test_specify(AHCIQState *ahci, uint16_t sectors, + bool supported) +{ + AHCICommand *cmd; + uint8_t port; + + port = ahci_port_select(ahci); + ahci_port_clear(ahci, port); + + cmd = ahci_command_create(CMD_INIT_DP); + ahci_command_set_count(cmd, sectors); + if (!supported) { + ahci_command_expect_error(cmd, ATA_ERR_ABRT); + } + ahci_command_commit(ahci, cmd, port); + ahci_command_issue(ahci, cmd); + if (!supported) { + ASSERT_BIT_SET(ahci_px_rreg(ahci, port, AHCI_PX_TFD), + AHCI_PX_TFD_STS_ERR); + } + ahci_command_verify(ahci, cmd); + ahci_command_free(cmd); +} + static void ahci_test_max(AHCIQState *ahci) { RegD2HFIS *d2h = g_malloc0(0x20); @@ -1012,6 +1036,21 @@ static void test_identify(void) ahci_shutdown(ahci); } +static void test_specify(void) +{ + AHCIQState *ahci; + + ahci = ahci_boot_and_enable(NULL); + + /* A register FIS carries 16 bits of count, the legacy ports only eight */ + ahci_test_specify(ahci, 0, false); + ahci_test_specify(ahci, 256, false); + ahci_test_specify(ahci, 0xffff, false); + ahci_test_specify(ahci, 32, true); + + ahci_shutdown(ahci); +} + /** * Fragmented DMA test: Perform a standard 4K DMA read/write * test, but make sure the physical regions are fragmented to @@ -2220,6 +2259,7 @@ int main(int argc, char **argv) qtest_add_func("/ahci/migrate/dma/halted", test_migrate_halted_dma); qtest_add_func("/ahci/max", test_max); + qtest_add_func("/ahci/specify", test_specify); qtest_add_func("/ahci/reset/simple", test_reset); qtest_add_func("/ahci/reset/pending_callback", test_reset_pending_callback); -- 2.53.0