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From: sashiko-bot@kernel.org
To: "Mallesh Koujalagi" <mallesh.koujalagi@intel.com>
Cc: intel-xe@lists.freedesktop.org
Subject: Re: [PATCH v4 5/7] drm/xe/sysctrl: Improve firmware response error logging
Date: Thu, 20 Aug 2026 10:28:50 +0000	[thread overview]
Message-ID: <20260820102850.781A61F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260820101632.527214-14-mallesh.koujalagi@intel.com>

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:

Pre-existing issues:
- [High] Failing to drain all response frames leaves the sysctrl mailbox in an incomplete state.
- [High] Incorrect endianness conversion when reading/writing sysctrl mailbox frames on big-endian systems.
--

--- Patch [5]: [PATCH v4 5/7] drm/xe/sysctrl: Improve firmware response error logging ---
commit f799e2637d5118be81198e34aa2cb7d8ca6d55fc
Author: Mallesh Koujalagi <mallesh.koujalagi@intel.com>

drm/xe/sysctrl: Improve firmware response error logging

This commit updates the sysctrl mailbox driver to use the xe_log_err helper
and includes additional details when a response header mismatch occurs.

[Severity: High]
This isn't a bug introduced by this patch, but does the frame processing
code handle endianness correctly on big-endian systems?

In sysctrl_read_frame():

	for (i = 0; i < dw; i++)
		val[i] = xe_mmio_read32(sc->mmio, regs[i]);

	memcpy(frame, val, len);

And in sysctrl_write_frame():

	memcpy(val, frame, len);

	for (i = 0; i < dw; i++)
		xe_mmio_write32(sc->mmio, regs[i], val[i]);

Since xe_mmio_read32 and xe_mmio_write32 handle CPU-endian u32 values,
won't using memcpy to move data between a little-endian byte stream and
a CPU-endian u32 array inadvertently byte-swap each 32-bit word on
big-endian architectures, resulting in corrupted headers and payloads?

> diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c b/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c
> index c043b51cacc89..9d7915c9d4ae8 100644
> --- a/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c
> +++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c
> @@ -237,13 +237,17 @@ static int sysctrl_receive_frames(struct xe_sysctrl *sc,

[Severity: High]
This is a pre-existing issue, but what happens if the firmware sends more
frames than expected?

Earlier in sysctrl_receive_frames(), the loop reads frames based on remain:

	while (!done && remain) {
		frame_size = min_t(size_t, remain, XE_SYSCTRL_MB_FRAME_SIZE);

		ret = sysctrl_process_frame(sc, out, frame_size, timeout_ms,
					    &done);
		if (ret)
			return ret;

		remain -= frame_size;
		out += frame_size;
	}

If the caller provides a data_out_len that is smaller than the firmware's
actual response size, the driver will stop reading when remain drops to 0
while done is still false.

Will this return success while leaving the hardware waiting for the host to
read and acknowledge the remaining frames, potentially causing subsequent
sysctrl communications to fail with mailbox busy timeouts?

>  	if (!XE_SYSCTRL_HDR_IS_RESPONSE(hdr) ||
>  	    XE_SYSCTRL_HDR_GROUP_ID(hdr) != XE_SYSCTRL_HDR_GROUP_ID(req) ||
>  	    XE_SYSCTRL_HDR_COMMAND(hdr) != XE_SYSCTRL_HDR_COMMAND(req)) {
> -		xe_err(xe, "sysctrl: Response header mismatch\n");
> +		xe_log_err(xe, SYSCTRL, -EPROTO,
> +			   "Response header mismatch: got group=0x%02lx cmd=0x%02lx is_resp=%lu, expected group=0x%02lx cmd=0x%02lx\n",
> +			   XE_SYSCTRL_HDR_GROUP_ID(hdr), XE_SYSCTRL_HDR_COMMAND(hdr),
> +			   XE_SYSCTRL_HDR_IS_RESPONSE(hdr),
> +			   XE_SYSCTRL_HDR_GROUP_ID(req), XE_SYSCTRL_HDR_COMMAND(req));
>  		return -EPROTO;
>  	}
>  
>  	if (XE_SYSCTRL_HDR_RESULT(hdr) != 0) {
> -		xe_err(xe, "sysctrl: Firmware error: 0x%02lx\n",
> -		       XE_SYSCTRL_HDR_RESULT(hdr));
> +		xe_log_err(xe, SYSCTRL, -EIO, "Firmware error: 0x%02lx\n",
> +			   XE_SYSCTRL_HDR_RESULT(hdr));
>  		return -EIO;
>  	}

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260820101632.527214-9-mallesh.koujalagi@intel.com?part=5

  reply	other threads:[~2026-08-20 10:28 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-20 10:16 [PATCH v4 0/7] drm/xe/sysctrl: Clean up error handling in Mallesh Koujalagi
2026-08-20 10:16 ` [PATCH v4 1/7] drm/xe/sysctrl: Return error codes from sysctrl_wait_bit_clear() Mallesh Koujalagi
2026-08-20 10:16 ` [PATCH v4 2/7] drm/xe/sysctrl: Return error codes from sysctrl_wait_bit_set() Mallesh Koujalagi
2026-08-20 10:16 ` [PATCH v4 3/7] drm/xe/sysctrl: Make sysctrl_write_frame() void Mallesh Koujalagi
2026-08-20 10:16 ` [PATCH v4 4/7] drm/xe/sysctrl: Use xe_assert() for payload size validation Mallesh Koujalagi
2026-08-20 10:16 ` [PATCH v4 5/7] drm/xe/sysctrl: Improve firmware response error logging Mallesh Koujalagi
2026-08-20 10:28   ` sashiko-bot [this message]
2026-08-20 10:16 ` [PATCH v4 6/7] drm/xe/sysctrl: Log group and command ID on mailbox failure Mallesh Koujalagi
2026-08-20 10:16 ` [PATCH v4 7/7] drm/xe/sysctrl: Report 'System Controller event' error using SIGID Mallesh Koujalagi
2026-08-20 10:25 ` ✓ CI.KUnit: success for drm/xe/sysctrl: Clean up error handling in Patchwork
2026-08-20 11:01 ` ✓ Xe.CI.BAT: " Patchwork
2026-08-20 12:14 ` ✓ Xe.CI.FULL: " Patchwork

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