From: Guanghui Feng <guanghuifeng@linux.alibaba.com>
To: baolu.lu@linux.intel.com
Cc: dwmw2@infradead.org, guanghuifeng@linux.alibaba.com,
iommu@lists.linux.dev, joro@8bytes.org,
linux-kernel@vger.kernel.org, robin.murphy@arm.com,
will@kernel.org, "bikuan . zbk" <bikuan.zbk@alibaba-inc.com>
Subject: [PATCH] iommu/vt-d: Fix IQE handling to cover all descriptors in submission range
Date: Thu, 20 Aug 2026 22:47:41 +0800 [thread overview]
Message-ID: <20260820144741.920858-1-guanghuifeng@linux.alibaba.com> (raw)
In-Reply-To: <06975717-677b-4c81-8c74-63d42b335db7@linux.intel.com>
Currently, qi_check_fault() only handles IQE (Invalidation Queue Error)
when the faulting descriptor index exactly matches the first descriptor
of the current submission (head == index). This is too restrictive in
multi-descriptor submissions where the error could occur at any
descriptor within the batch.
If the IQE is triggered by a descriptor that belongs to the current
submission but is not at the starting index, the function returns 0
without clearing the IQE fault status. Since hardware stops fetching
new descriptors until IQE is cleared, this leads to an indefinite wait
on the wait descriptor completion - effectively a deadlock.
Fix this by expanding the IQE handling condition to cover all descriptors
within the circular range [index, wait_index]. Use explicit bounds
checking that properly handles the wrap-around case of the circular
queue.
Signed-off-by: Guanghui Feng <guanghuifeng@linux.alibaba.com>
Signed-off-by: bikuan.zbk <bikuan.zbk@alibaba-inc.com>
---
drivers/iommu/intel/dmar.c | 15 ++++++++++++++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/drivers/iommu/intel/dmar.c b/drivers/iommu/intel/dmar.c
index ba675b08cd20..ecc95af06f61 100644
--- a/drivers/iommu/intel/dmar.c
+++ b/drivers/iommu/intel/dmar.c
@@ -1366,8 +1366,21 @@ static int qi_check_fault(struct intel_iommu *iommu, int index, int wait_index)
* is cleared.
*/
if (fault & DMA_FSTS_IQE) {
+ int head_idx;
+
head = readl(iommu->reg + DMAR_IQH_REG);
- if ((head >> shift) == index) {
+ head_idx = head >> shift;
+
+ /*
+ * The faulting descriptor can be anywhere within the current
+ * submission's range [index, wait_index]. Since the queue is
+ * circular, this submission may wrap around QI_LENGTH
+ * (index > wait_index in that case), so check both the
+ * non-wrapped and wrapped cases of the range.
+ */
+ if (index <= wait_index ?
+ (head_idx >= index && head_idx <= wait_index) :
+ (head_idx >= index || head_idx <= wait_index)) {
struct qi_desc *desc = qi->desc + head;
/*
--
2.43.7
next prev parent reply other threads:[~2026-08-20 14:48 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-05 4:20 [PATCH] iommu/vt-d: Fix IQE handling to cover all descriptors in submission range Guanghui Feng
2026-08-20 3:09 ` Baolu Lu
2026-08-20 14:47 ` Guanghui Feng [this message]
2026-08-20 19:37 ` Samiullah Khawaja
2026-08-21 2:56 ` Baolu Lu
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