From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 219CEC5DF87 for ; Fri, 21 Aug 2026 13:28:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=Dgn0ghk2S3fd79b0m7Z1xO/IlUySCDAgvzYydbZ2OHk=; b=qUqGm/O2t9lSWq tJ8VM07qwJiR4wMqyVRJPWxNbO0lwjyE5djkQGWd88u2M0dNNmNaIj5FazlOzDcS6D8vnsGsbu+iv V+PteBVj+iyBDZXhnN7snL2ax+KOyZmaa2nHw5u/M1Lurz/gl08t4ClQt1PK7wTq2IhqjAKUxuVqa 0IIOiV5v8n8+5oGW/hXKKwvuinoowCUAYMctr4DtgT0Egj+ev2ztPQ87F/uK2y8ucTmHZBEEzkAyg fZcyzo2TvyKJoKuq4QW8wIB7u739aq68Lt/EW1ZPq06RRs3BcRvwquCe6PMJQ3BkoaDNiyn0GSMkT ky+f+2cGcqagBNNTrhYw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1wxPHy-0000000DP7G-0t65; Fri, 21 Aug 2026 13:28:06 +0000 Received: from out30-100.freemail.mail.aliyun.com ([115.124.30.100]) by bombadil.infradead.org with esmtps (Exim 4.99.1 #2 (Red Hat Linux)) id 1wxPHt-0000000DP4d-32m5 for linux-riscv@lists.infradead.org; Fri, 21 Aug 2026 13:28:04 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.alibaba.com; s=default; t=1787318876; h=From:To:Subject:Date:Message-Id:MIME-Version:Content-Type; bh=FQZVISIu+7OErW0PwVSS24Fbga2XewF6EwSwZSSnvvM=; b=NEy9++9oY2hwxhuE7nwYxHCBvNziMzFGvy7rARzO70wtljk8CphEiC3xaz9RyiYgOPEYmbjcComSz0unxu04M6x+GRX94JrZCcUTIP19ZKOrILvPOUM3IYAe+J3B58NbohteeUIXX6PbUVMenEH4MNqpgW8KX4d3lSuUOfqUU1Y= X-Alimail-AntiSpam: AC=PASS;BC=-1|-1;BR=01201311R141e4;CH=green;DM=||false|;DS=||;FP=0|-1|-1|-1|0|-1|-1|-1;HT=maildocker-contentspam033037033178;MF=fangyu.yu@linux.alibaba.com;NM=1;PH=DS;RN=24;SR=0;TI=SMTPD_---0X9MSFFA_1787318872; Received: from localhost.localdomain(mailfrom:fangyu.yu@linux.alibaba.com fp:SMTPD_---0X9MSFFA_1787318872 cluster:ay36) by smtp.aliyun-inc.com; Fri, 21 Aug 2026 21:27:54 +0800 From: fangyu.yu@linux.alibaba.com To: tomasz.jeznach@linux.dev, joro@8bytes.org, will@kernel.org, robin.murphy@arm.com, pjw@kernel.org, palmer@dabbelt.com, aou@eecs.berkeley.edu, alex@ghiti.fr, baolu.lu@linux.intel.com, jroedel@suse.de, zong.li@sifive.com, andrew.jones@oss.qualcomm.com, anup@brainfault.org, jgg@nvidia.com, jgg@ziepe.ca, kevin.tian@intel.com, atish.patra@linux.dev, skhawaja@google.com, vasant.hegde@amd.com Cc: fangyu.yu@linux.alibaba.com, guoren@kernel.org, iommu@lists.linux.dev, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Subject: [RFC PATCH v3 00/10] iommu/riscv: Add hardware dirty tracking for second-stage domains Date: Fri, 21 Aug 2026 21:27:40 +0800 Message-Id: <20260821132749.82070-1-fangyu.yu@linux.alibaba.com> X-Mailer: git-send-email 2.39.3 (Apple Git-146) MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260821_062802_801894_166AFF85 X-CRM114-Status: GOOD ( 10.83 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org RnJvbTogRmFuZ3l1IFl1IDxmYW5neXUueXVAbGludXguYWxpYmFiYS5jb20+CgpUaGUgUklTQy1W IElPTU1VIGFyY2hpdGVjdHVyZSBkZWZpbmVzIGFuIEFNT19IV0FEIGNhcGFiaWxpdHkgKEhhcmR3 YXJlCkFjY2Vzcy9EaXJ0eSB1cGRhdGUpIHRoYXQgYWxsb3dzIHRoZSBJT01NVSB0byBhdG9taWNh bGx5IHNldCB0aGUgQS9EIGJpdHMKaW4gc2Vjb25kLXN0YWdlIFBURXMgb24gRE1BIGFjY2Vzcy4g IFdoZW4gREMudGMuR0FERSBpcyBhc3NlcnRlZCwgdGhlIElPTU1VCmF1dG9ub21vdXNseSBzZXRz IEQgb24gdGhlIGZpcnN0IHdyaXRlIHRvIGEgcGFnZSBtYXBwZWQgYnkgYW4gaW9oZ2F0cApkb21h aW4uICBUaGlzIHNlcmllcyB3aXJlcyB0aGF0IGNhcGFiaWxpdHkgdXAgdG8gdGhlIGlvbW11ZmQg ZGlydHktdHJhY2tpbmcKaW50ZXJmYWNlIChJT01NVV9IV1BUX1NFVF9ESVJUWV9UUkFDS0lORyAv IElPTU1VX0hXUFRfR0VUX0RJUlRZX0JJVE1BUCkgYW5kCnJlcG9ydHMgSU9NTVVfQ0FQX0RJUlRZ X1RSQUNLSU5HLgoKRGVzaWduIG5vdGVzCi0tLS0tLS0tLS0tLQoKKiBUaGUgZmVhdHVyZSBpcyBz Y29wZWQgdG8gc2Vjb25kLXN0YWdlIChpb2hnYXRwKSBkb21haW5zIG9ubHk7IHRoZXNlIGFyZQog IHRoZSBkb21haW5zIGNyZWF0ZWQgZm9yIEtWTSAvIFZGSU8gZGV2aWNlIHBhc3MtdGhyb3VnaCB3 aGVuIHVzZXJzcGFjZQogIGFsbG9jYXRlcyBhbiBIV1BUIHdpdGggSU9NTVVfSFdQVF9BTExPQ19O RVNUX1BBUkVOVCBvcgogIElPTU1VX0hXUFRfQUxMT0NfRElSVFlfVFJBQ0tJTkcuICBGaXJzdC1z dGFnZSAoaW9zYXRwKSBkb21haW5zIGFyZSBub3QKICB0b3VjaGVkIGJ5IHRoaXMgc2VyaWVzLgoK KiBUaGUgcGFnZS10YWJsZSBzaWRlIHBsdWdzIGludG8gdGhlIGV4aXN0aW5nIGdlbmVyaWNfcHQg ZGlydHkgaG9vawogIGZyYW1ld29yayAoYW1kdjEgLyB2dGRzcyBzdHlsZSkuICBSSVNDLVYgYWRk cyB0aGUgdGhyZWUgcmVxdWlyZWQgUFRFCiAgb3BzIOKAkyBpc193cml0ZV9kaXJ0eSAvIG1ha2Vf d3JpdGVfY2xlYW4gLyBtYWtlX3dyaXRlX2RpcnR5LgoKVGVzdGluZwotLS0tLS0tCgoqIFRlc3Qg b24gUUVNVSBSSVNDLVYsIGEgbnZtZSBhbmQgYW4gZTEwMDBlIGRldmljZSB3YXMgcGFzc2VkIHRo cm91Z2gKICB0byBhbiBMMiBndWVzdCB2aWEgdmZpby1wY2kgKyBpb21tdWZkLgoKKiBnZW5lcmlj X3B0IEtVbml0OiB0aGUgZXhpc3RpbmcgdGVzdF9kaXJ0eSBjYXNlIG5vdyBydW5zIGFuZCBwYXNz ZXMgZm9yCiAgdGhlIFJJU0MtViA2NC1iaXQgZm9ybWF0LgoKRm9sbG93LXVwIHdvcmsKLS0tLS0t LS0tLS0tLS0KKiBCdWlsZCBhIGRlZGljYXRlZCBlbmQtdG8tZW5kIHRlc3QgY2FzZSB0aGF0IGRy aXZlcyB0aGUgZnVsbCBmbG93CiAgKEhXUFRfQUxMT0Mgd2l0aCBESVJUWV9UUkFDS0lORyAtPiBh dHRhY2ggLT4gSU9BU19NQVAgLT4gZ2VuZXJhdGUgcmVhbAogIERNQSAtPiBTRVRfRElSVFlfVFJB Q0tJTkcgLT4gR0VUX0RJUlRZX0JJVE1BUCAtPiB2ZXJpZnkgYml0bWFwIGFnYWluc3QKICBleHBl Y3RlZCBJT1ZBIGZvb3RwcmludCkgc28gdGhhdCB0aGUgYmVoYXZpb3VyIGNhbiBiZSByZWdyZXNz aW9uLXRlc3RlZAogIGJleW9uZCB0aGUgS1VuaXQgUFRFLWxldmVsIGNvdmVyYWdlLgoKKiBJZiBw b3NzaWJsZSwgcmViYXNlIGFuZCByZXRlc3Qgb24gdG9wIG9mIHRoZSB1cGRhdGVkICJpb21tdSBp cnFieXBhc3MiCiAgcGF0Y2hzZXQuCgotLS0KQ2hhbmdlcyBpbiB2MyAoQW5kcmV3IEpvbmVzJ3Mg c3VnZ2VzdGlvbnMpOgogICAgLSBSZWJhc2VkIHRoZSBzZXJpZXMgb24gdG9wIG9mIEFuZHJldyBK b25lcycgZ2VuZXJpY19wdCBSSVNDLVYgc3VwcG9ydGVkCiAgICAgIGZlYXR1cmUgbWFzayBmaXgs IHdoaWNoIGFkZHMgUFRfRkVBVF9SSVNDVl9TVlBCTVQgdG8gdGhlIHN1cHBvcnRlZCBmZWF0dXJl CiAgICAgIHNldC4KICAgIC0gQWRkZWQgUFRfRkVBVF9SSVNDVl9TMiB0byB0aGUgUklTQy1WIGdl bmVyaWNfcHQgc3VwcG9ydGVkIGZlYXR1cmUgbWFzayBhbmQKICAgICAgS1VuaXQgZmVhdHVyZSBt YXRyaXguCiAgICAtIEtlcHQgUFRfRkVBVF9TSUdOX0VYVEVORCBvbmx5IGZvciBmaXJzdC1zdGFn ZSBSSVNDLVYgS1VuaXQgY29uZmlnczsgc2Vjb25kCiAgICAgIHN0YWdlIGNvbmZpZ3Mgbm93IHVz ZSBQVF9GRUFUX1JJU0NWX1MyIHdpdGhvdXQgc2lnbi1leHRlbnNpb24gc2VtYW50aWNzLgogICAg LSBTcGxpdCBSSVNDLVYgSU9NTVUgY2FwYWJpbGl0eSBjaGVja3MgaW50byBmaXJzdC1zdGFnZSBG U0MgYW5kIHNlY29uZC1zdGFnZQogICAgICBJT0hHQVRQIGhlbHBlcnMuCiAgICAtIFVwZGF0ZWQg c2Vjb25kLXN0YWdlIHBhZ2luZyBkb21haW4gc2V0dXAgdG8gdXNlIEdQQSB3aWR0aHMgNDEvNTAv NTkgYW5kIHRvCiAgICAgIGF2b2lkIFBUX0ZFQVRfU0lHTl9FWFRFTkQuCiAgICAtIExpbmsgdG8g djI6CiAgICAgIGh0dHBzOi8vbG9yZS5rZXJuZWwub3JnL2xpbnV4LXJpc2N2LzIwMjYwNTA3MTEz NzA2LjExNDAwLTEtZmFuZ3l1Lnl1QGxpbnV4LmFsaWJhYmEuY29tLwpDaGFuZ2VzIGluIHYyIChK YXNvbidzIHN1Z2dlc3Rpb25zKToKICAgIC0gSW50cm9kdWNlZCBhIHNpbmdsZSBQVF9GRUFUX1JJ U0NWX1MyOiBzZWNvbmQtc3RhZ2Ugc2VsZWN0aW9uIGlzIGRyaXZlbgogICAgICBwdXJlbHkgYnkg dGhpcyBmZWF0dXJlIGJpdC4KICAgIC0gU3dpdGNoZWQgZnJvbSBkeW5hbWljIERDLnRjLkdBREUg dG9nZ2xpbmcgdG8gc3RhdGljIHByZS1lbmFibGUuCiAgICAtIGRvbWFpbl9hbGxvY19wYWdpbmdf ZmxhZ3M6IGZvbGxvdyB0aGUgc3dpdGNoL2Nhc2UgZGVzaWduIGZyb20gb3RoZXIKICAgICAgZHJp dmVycy4KICAgIC0gRHJvcCBJT01NVV9DQVBfREVGRVJSRURfRkxVU0ggaW4gcmlzY3ZfaW9tbXVf Y2FwYWJsZS4KICAgIC0gUmVtb3ZlIHRoZSAuaHdfaW5mby1yZWxhdGVkIHBhdGNoLgogICAgLSBM aW5rIHRvIHYxOgogICAgICBodHRwczovL2xvcmUua2VybmVsLm9yZy9saW51eC1yaXNjdi8yMDI2 MDQyODEzMTM1OS4zNDg3Mi0xLWZhbmd5dS55dUBsaW51eC5hbGliYWJhLmNvbS8KCkZhbmd5dSBZ dSAoNik6CiAgaW9tbXVwdDogQWRkIFJJU0MtViBTZWNvbmQtc3RhZ2UgKGlvaGdhdHApIHBhZ2Ug dGFibGUgc3VwcG9ydAogIGlvbW11cHQ6IEFkZCBSSVNDLVYgZGlydHkgdHJhY2tpbmcgUFRFIG9w cwogIGlvbW11L3Jpc2N2OiBBZGQgZG9tYWluX2FsbG9jX3BhZ2luZ19mbGFncyBmb3Igc2Vjb25k LXN0YWdlIGRvbWFpbgogIGlvbW11L3Jpc2N2OiBQcmUtZW5hYmxlIEdBREUgZm9yIHNlY29uZC1z dGFnZSBkb21haW5zCiAgaW9tbXUvcmlzY3Y6IEFkZCBkaXJ0eSB0cmFja2luZyBzdXBwb3J0IGZv ciBzZWNvbmQtc3RhZ2UgZG9tYWlucwogIGlvbW11L3Jpc2N2OiBBZGQgSU9USU5WQUwuR1ZNQSBh ZnRlciB1cGRhdGluZyBERFQvUERUIGVudHJpZXMKClRvbWFzeiBKZXpuYWNoICgyKToKICBpb21t dS9yaXNjdjogcmVwb3J0IGlvbW11IGNhcGFiaWxpdGllcwogIFJJU0MtVjogS1ZNOiBFbmFibGUg S1ZNX1ZGSU8gaW50ZXJmYWNlcyBvbiBSSVNDLVYgYXJjaAoKWm9uZyBMaSAoMik6CiAgaW9tbXUv cmlzY3Y6IHVzZSBkYXRhIHN0cnVjdHVyZSBpbnN0ZWFkIG9mIGluZGl2aWR1YWwgdmFsdWVzCiAg aW9tbXUvcmlzY3Y6IHN1cHBvcnQgR1NDSUQgYW5kIEdWTUEgaW52YWxpZGF0aW9uIGNvbW1hbmQK CiBhcmNoL3Jpc2N2L2t2bS9LY29uZmlnICAgICAgICAgICAgICAgICAgICAgICB8ICAgMiArCiBk cml2ZXJzL2lvbW11L2dlbmVyaWNfcHQvZm10L2lvbW11X3Jpc2N2NjQuYyB8ICAgMiArLQogZHJp dmVycy9pb21tdS9nZW5lcmljX3B0L2ZtdC9yaXNjdi5oICAgICAgICAgfCAxMjAgKysrKysrKysr LQogZHJpdmVycy9pb21tdS9yaXNjdi9pb21tdS1iaXRzLmggICAgICAgICAgICAgfCAgIDcgKwog ZHJpdmVycy9pb21tdS9yaXNjdi9pb21tdS5jICAgICAgICAgICAgICAgICAgfCAyMjQgKysrKysr KysrKysrKysrLS0tLQogaW5jbHVkZS9saW51eC9nZW5lcmljX3B0L2NvbW1vbi5oICAgICAgICAg ICAgfCAgIDQgKwogaW5jbHVkZS9saW51eC9nZW5lcmljX3B0L2lvbW11LmggICAgICAgICAgICAg fCAgMTcgKy0KIDcgZmlsZXMgY2hhbmdlZCwgMzE3IGluc2VydGlvbnMoKyksIDU5IGRlbGV0aW9u cygtKQoKLS0gCjIuNTAuMQoKCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fCmxpbnV4LXJpc2N2IG1haWxpbmcgbGlzdApsaW51eC1yaXNjdkBsaXN0cy5pbmZy YWRlYWQub3JnCmh0dHA6Ly9saXN0cy5pbmZyYWRlYWQub3JnL21haWxtYW4vbGlzdGluZm8vbGlu dXgtcmlzY3YK From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from out30-100.freemail.mail.aliyun.com (out30-100.freemail.mail.aliyun.com [115.124.30.100]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 53D2C370D79 for ; Fri, 21 Aug 2026 13:28:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=115.124.30.100 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787318888; cv=none; b=dzyoPTljJ10lpM2Qq/Q01Gh4B61+GhEONb8WJR654uZs8L2GkmvCX/meCC3ihHHPLYK6ADgfnZwloK2xXRFMh+4DOv3PQww5MNCstS19eT7CIkDs37UZQMHaHJaM9sVFxgS+x2HpUmjKoGUw8L0ZTuIRvYT9yMDZ20HcTra8dQ8= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787318888; c=relaxed/simple; bh=21XZ9BXWcC5puKkNvdTtXB+wuqY9w5/tpYCQJOExbBs=; h=From:To:Cc:Subject:Date:Message-Id:MIME-Version:Content-Type; b=NOBrZqft0qO30+Z9RX9lZkCYfMoHMzA3x6h7J3GLn4FSR9EYUhwymzbR4PSHRCZW2UZkK1xK4cdhS4C4b+W4Yb1STieo5BwlV4dIi/vdPlbUJSP4zPe8QwUwkVqXR86PMqN++hZM/27aud9vABts5XkhvB8a866NpPphTuJzk68= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.alibaba.com; spf=pass smtp.mailfrom=linux.alibaba.com; dkim=pass (1024-bit key) header.d=linux.alibaba.com header.i=@linux.alibaba.com header.b=I3ub4AEZ; arc=none smtp.client-ip=115.124.30.100 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.alibaba.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.alibaba.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.alibaba.com header.i=@linux.alibaba.com header.b="I3ub4AEZ" DKIM-Signature:v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.alibaba.com; s=default; t=1787318877; h=From:To:Subject:Date:Message-Id:MIME-Version:Content-Type; bh=FQZVISIu+7OErW0PwVSS24Fbga2XewF6EwSwZSSnvvM=; b=I3ub4AEZx/F4F1VMJuJX2oJFhvXUBshXDb64ZGPWXv64OinW8dOgfg4xI0hMBHyyIUOAnspTM6Yc/DEmAISleIjLsJssBzZdNEJcKN5b5U/PbRP++V3YgkV2A2Yj1X+3brQ0y+rleixQjJFhyvdqnd09l/3O0H/wt8n8J1zsRbw= X-Alimail-AntiSpam:AC=PASS;BC=-1|-1;BR=01201311R141e4;CH=green;DM=||false|;DS=||;FP=0|-1|-1|-1|0|-1|-1|-1;HT=maildocker-contentspam033037033178;MF=fangyu.yu@linux.alibaba.com;NM=1;PH=DS;RN=24;SR=0;TI=SMTPD_---0X9MSFFA_1787318872; Received: from localhost.localdomain(mailfrom:fangyu.yu@linux.alibaba.com fp:SMTPD_---0X9MSFFA_1787318872 cluster:ay36) by smtp.aliyun-inc.com; Fri, 21 Aug 2026 21:27:54 +0800 From: fangyu.yu@linux.alibaba.com To: tomasz.jeznach@linux.dev, joro@8bytes.org, will@kernel.org, robin.murphy@arm.com, pjw@kernel.org, palmer@dabbelt.com, aou@eecs.berkeley.edu, alex@ghiti.fr, baolu.lu@linux.intel.com, jroedel@suse.de, zong.li@sifive.com, andrew.jones@oss.qualcomm.com, anup@brainfault.org, jgg@nvidia.com, jgg@ziepe.ca, kevin.tian@intel.com, atish.patra@linux.dev, skhawaja@google.com, vasant.hegde@amd.com Cc: fangyu.yu@linux.alibaba.com, guoren@kernel.org, iommu@lists.linux.dev, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Subject: [RFC PATCH v3 00/10] iommu/riscv: Add hardware dirty tracking for second-stage domains Date: Fri, 21 Aug 2026 21:27:40 +0800 Message-Id: <20260821132749.82070-1-fangyu.yu@linux.alibaba.com> X-Mailer: git-send-email 2.39.3 (Apple Git-146) Precedence: bulk X-Mailing-List: iommu@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Fangyu Yu The RISC-V IOMMU architecture defines an AMO_HWAD capability (Hardware Access/Dirty update) that allows the IOMMU to atomically set the A/D bits in second-stage PTEs on DMA access. When DC.tc.GADE is asserted, the IOMMU autonomously sets D on the first write to a page mapped by an iohgatp domain. This series wires that capability up to the iommufd dirty-tracking interface (IOMMU_HWPT_SET_DIRTY_TRACKING / IOMMU_HWPT_GET_DIRTY_BITMAP) and reports IOMMU_CAP_DIRTY_TRACKING. Design notes ------------ * The feature is scoped to second-stage (iohgatp) domains only; these are the domains created for KVM / VFIO device pass-through when userspace allocates an HWPT with IOMMU_HWPT_ALLOC_NEST_PARENT or IOMMU_HWPT_ALLOC_DIRTY_TRACKING. First-stage (iosatp) domains are not touched by this series. * The page-table side plugs into the existing generic_pt dirty hook framework (amdv1 / vtdss style). RISC-V adds the three required PTE ops – is_write_dirty / make_write_clean / make_write_dirty. Testing ------- * Test on QEMU RISC-V, a nvme and an e1000e device was passed through to an L2 guest via vfio-pci + iommufd. * generic_pt KUnit: the existing test_dirty case now runs and passes for the RISC-V 64-bit format. Follow-up work -------------- * Build a dedicated end-to-end test case that drives the full flow (HWPT_ALLOC with DIRTY_TRACKING -> attach -> IOAS_MAP -> generate real DMA -> SET_DIRTY_TRACKING -> GET_DIRTY_BITMAP -> verify bitmap against expected IOVA footprint) so that the behaviour can be regression-tested beyond the KUnit PTE-level coverage. * If possible, rebase and retest on top of the updated "iommu irqbypass" patchset. --- Changes in v3 (Andrew Jones's suggestions): - Rebased the series on top of Andrew Jones' generic_pt RISC-V supported feature mask fix, which adds PT_FEAT_RISCV_SVPBMT to the supported feature set. - Added PT_FEAT_RISCV_S2 to the RISC-V generic_pt supported feature mask and KUnit feature matrix. - Kept PT_FEAT_SIGN_EXTEND only for first-stage RISC-V KUnit configs; second stage configs now use PT_FEAT_RISCV_S2 without sign-extension semantics. - Split RISC-V IOMMU capability checks into first-stage FSC and second-stage IOHGATP helpers. - Updated second-stage paging domain setup to use GPA widths 41/50/59 and to avoid PT_FEAT_SIGN_EXTEND. - Link to v2: https://lore.kernel.org/linux-riscv/20260507113706.11400-1-fangyu.yu@linux.alibaba.com/ Changes in v2 (Jason's suggestions): - Introduced a single PT_FEAT_RISCV_S2: second-stage selection is driven purely by this feature bit. - Switched from dynamic DC.tc.GADE toggling to static pre-enable. - domain_alloc_paging_flags: follow the switch/case design from other drivers. - Drop IOMMU_CAP_DEFERRED_FLUSH in riscv_iommu_capable. - Remove the .hw_info-related patch. - Link to v1: https://lore.kernel.org/linux-riscv/20260428131359.34872-1-fangyu.yu@linux.alibaba.com/ Fangyu Yu (6): iommupt: Add RISC-V Second-stage (iohgatp) page table support iommupt: Add RISC-V dirty tracking PTE ops iommu/riscv: Add domain_alloc_paging_flags for second-stage domain iommu/riscv: Pre-enable GADE for second-stage domains iommu/riscv: Add dirty tracking support for second-stage domains iommu/riscv: Add IOTINVAL.GVMA after updating DDT/PDT entries Tomasz Jeznach (2): iommu/riscv: report iommu capabilities RISC-V: KVM: Enable KVM_VFIO interfaces on RISC-V arch Zong Li (2): iommu/riscv: use data structure instead of individual values iommu/riscv: support GSCID and GVMA invalidation command arch/riscv/kvm/Kconfig | 2 + drivers/iommu/generic_pt/fmt/iommu_riscv64.c | 2 +- drivers/iommu/generic_pt/fmt/riscv.h | 120 +++++++++- drivers/iommu/riscv/iommu-bits.h | 7 + drivers/iommu/riscv/iommu.c | 224 +++++++++++++++---- include/linux/generic_pt/common.h | 4 + include/linux/generic_pt/iommu.h | 17 +- 7 files changed, 317 insertions(+), 59 deletions(-) -- 2.50.1