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DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: dl/58O/wDHdaViuwbTAlWBjmDggfI2lurBc1nEJjigPD8/343DeFb5fdcXKCJqa/biJ21KkI0FglS9KEqJVKqayjPCEnmc4qrHIf1TaSm6zKmZPWiWog/FCB7auoa9Wch1XpKl2LwnzAs4H2+Xm0khpkL9Z7Gbaa+Z6Dt1e7vSJGQ3L6GvLB811aK70mDZD3YlkebTGUhsqKn5fQDT2I2E1JdWc5xUa+VMVMirEDGDIGcJGNgfY4EbV6bd5jR6fSOYZO9OOwb42iUnisjQYeJ9AgCUpmaj2xtfpGAv+m/9u+mm0dppJJfKL4q/nDD6E/ROeQ4qrvpE51v7pKqd8uiT2rLYK1VkZtZfJSAISQmNTzsI4D3+HnWd9g1d7e3q126l5jWHxCMGKKSl1GTQQuaWyBjn/1yU7n8nCAi135mhRWH5+PR7OUkUMMF39vOqOp X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Aug 2026 19:36:13.9249 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3c41c0bf-d847-47c0-1611-08deffbb7631 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000EDD6.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB7222 X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" From: Lijo Lazar Move more IP version specific related things to ualink version file. Use soc v1.0 IH client id defintion and define mpnht interrupt source id in ivsrcid header. Signed-off-by: Lijo Lazar Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_ualink.c | 28 +++++------------ drivers/gpu/drm/amd/amdgpu/amdgpu_ualink.h | 4 ++- drivers/gpu/drm/amd/amdgpu/ualink_v1_0.c | 24 +++++++++++++-- .../ivsrcid/mpnht/irqsrcs_mpnht_15_0.h | 30 +++++++++++++++++++ 4 files changed, 63 insertions(+), 23 deletions(-) create mode 100644 drivers/gpu/drm/amd/include/ivsrcid/mpnht/irqsrcs_mpnht_15_0.h diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ualink.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ualink.c index 63164f83342b6..58f16a5cae9e6 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ualink.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ualink.c @@ -1391,8 +1391,6 @@ static const struct kobj_type ualink_station_config_ktype = { int ualink_ip_sw_init(struct amdgpu_ip_block *ip_block) { - int r; - struct amdgpu_ualink_station_config *stations; struct amdgpu_ualink_vpod_config *vpod_config; struct amdgpu_ualink_ppod_setup *ppod_setup; @@ -1432,12 +1430,6 @@ int ualink_ip_sw_init(struct amdgpu_ip_block *ip_block) adev->ualink.config = vpod_config; adev->ualink.stations = stations; - r = amdgpu_ualink_init_interrupt(adev); - if (r) { - dev_err(adev->dev, "Failed to add UALink irq: %d\n", r); - return r; - } - return 0; } @@ -5964,32 +5956,28 @@ static const struct amdgpu_irq_src_funcs ualink_irq_funcs = { .process = amdgpu_ualink_process_irq, }; -/* TODO: if move to header file soc21_enum.h */ -#define UALINK_IH_CLIENT_ID 0x1C -#define UALINK_IH_SOURCE_ID 0x0 - /** - * amdgpu_ualink_init_interrupt - initialization of UALink IRQ + * amdgpu_ualink_init_interrupt - register the UALink IRQ source * @adev: amdgpu device pointer + * @client_id: IH client ID for the interrupt source + * @src_id: source ID for the interrupt source * - * Registers the UALink interrupt source with the IH (Interrupt Handler) - * subsystem during early device initialization. This sets up the IRQ - * callback functions for handling remote interrupts from peer GPUs. + * Registers the UALink interrupt source with the IH subsystem. * * Return: 0 on success, negative error code on failure */ -int amdgpu_ualink_init_interrupt(struct amdgpu_device *adev) +int amdgpu_ualink_init_interrupt(struct amdgpu_device *adev, + unsigned int client_id, unsigned int src_id) { int r; dev_dbg(adev->dev, "init ualink irq client_id 0x%x src_id 0x%x\n", - UALINK_IH_CLIENT_ID, UALINK_IH_SOURCE_ID); + client_id, src_id); adev->ualink.irq.num_types = 1; adev->ualink.irq.funcs = &ualink_irq_funcs; - r = amdgpu_irq_add_id(adev, UALINK_IH_CLIENT_ID, - UALINK_IH_SOURCE_ID, &adev->ualink.irq); + r = amdgpu_irq_add_id(adev, client_id, src_id, &adev->ualink.irq); return r; } diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ualink.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ualink.h index 97fe263a481db..22f5a48bf661d 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ualink.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ualink.h @@ -384,7 +384,9 @@ struct amdgpu_ualink_mgr { unsigned long drop_msg_bitmap; }; -int amdgpu_ualink_init_interrupt(struct amdgpu_device *adev); +int amdgpu_ualink_init_interrupt(struct amdgpu_device *adev, + unsigned int client_id, unsigned int src_id); + int amdgpu_ualink_sw_init(struct amdgpu_device *adev); void amdgpu_ualink_sw_fini(struct amdgpu_device *adev); diff --git a/drivers/gpu/drm/amd/amdgpu/ualink_v1_0.c b/drivers/gpu/drm/amd/amdgpu/ualink_v1_0.c index 0fe2c0fba4cf9..58cf98ac94add 100644 --- a/drivers/gpu/drm/amd/amdgpu/ualink_v1_0.c +++ b/drivers/gpu/drm/amd/amdgpu/ualink_v1_0.c @@ -23,6 +23,7 @@ #include #include "amdgpu.h" +#include "ivsrcid/mpnht/irqsrcs_mpnht_15_0.h" #include "amdgpu_ualink.h" #include "ualink_v1_0.h" @@ -104,11 +105,30 @@ static int ualink_v1_0_early_init(struct amdgpu_ip_block *ip_block) return 0; } +static int ualink_v1_0_sw_init(struct amdgpu_ip_block *ip_block) +{ + struct amdgpu_device *adev = ip_block->adev; + int r; + + r = ualink_ip_sw_init(ip_block); + if (r) + return r; + + r = amdgpu_ualink_init_interrupt(adev, SOC_V1_0_IH_CLIENTID_nHT, + MPNHT_15_0__SRCID__REMOTE_INTERRUPT); + if (r) { + dev_err(adev->dev, "Failed to add UALink irq: %d\n", r); + return r; + } + + return 0; +} + static const struct amd_ip_funcs ualink_v1_0_ip_funcs = { .name = "ualink", .early_init = ualink_v1_0_early_init, .late_init = ualink_ip_late_init, - .sw_init = ualink_ip_sw_init, + .sw_init = ualink_v1_0_sw_init, .sw_fini = ualink_ip_sw_fini, .hw_init = ualink_ip_hw_init, }; @@ -119,4 +139,4 @@ const struct amdgpu_ip_block_version ualink_v1_0_ip_block = { .minor = 0, .rev = 0, .funcs = &ualink_v1_0_ip_funcs, -}; \ No newline at end of file +}; diff --git a/drivers/gpu/drm/amd/include/ivsrcid/mpnht/irqsrcs_mpnht_15_0.h b/drivers/gpu/drm/amd/include/ivsrcid/mpnht/irqsrcs_mpnht_15_0.h new file mode 100644 index 0000000000000..c960353f107db --- /dev/null +++ b/drivers/gpu/drm/amd/include/ivsrcid/mpnht/irqsrcs_mpnht_15_0.h @@ -0,0 +1,30 @@ +/* + * Copyright 2026 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#ifndef __IRQSRCS_MPNHT_15_0_H__ +#define __IRQSRCS_MPNHT_15_0_H__ + +/* MPNHT remote interrupt */ +#define MPNHT_15_0__SRCID__REMOTE_INTERRUPT 0x00 + +#endif -- 2.55.0