From: kernel test robot <lkp@intel.com>
To: Matthew Wilcox <willy@infradead.org>
Cc: <oe-kbuild-all@lists.linux.dev>
Subject: [willy-pagecache:headers 6/21] drivers/ufs/host/ufs-mediatek.c:760:3: error: implicit declaration of function 'disable_irq'; did you mean 'disable_work'?
Date: Sun, 23 Aug 2026 20:15:31 +0800 [thread overview]
Message-ID: <202608230640.EctPKgHB-lkp@intel.com> (raw)
tree: git://git.infradead.org/users/willy/pagecache headers
head: 14ed95ee1eed0c72d54c159582017588ad1b2d68
commit: bcdc5eb7acfb699233f66662526dcd54c6c98bd1 [6/21] headers: Remove swap.h from suspend.h
config: arm-randconfig-001-20260823 (https://download.01.org/0day-ci/archive/20260823/202608230640.EctPKgHB-lkp@intel.com/config)
compiler: arm-linux-gnueabi-gcc (GCC) 10.5.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260823/202608230640.EctPKgHB-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202608230640.EctPKgHB-lkp@intel.com/
All errors (new ones prefixed by >>):
drivers/ufs/host/ufs-mediatek.c: In function 'ufs_mtk_mcq_disable_irq':
>> drivers/ufs/host/ufs-mediatek.c:760:3: error: implicit declaration of function 'disable_irq'; did you mean 'disable_work'? [-Werror=implicit-function-declaration]
760 | disable_irq(irq);
| ^~~~~~~~~~~
| disable_work
drivers/ufs/host/ufs-mediatek.c: In function 'ufs_mtk_mcq_enable_irq':
>> drivers/ufs/host/ufs-mediatek.c:781:3: error: implicit declaration of function 'enable_irq'; did you mean 'enable_work'? [-Werror=implicit-function-declaration]
781 | enable_irq(irq);
| ^~~~~~~~~~
| enable_work
drivers/ufs/host/ufs-mediatek.c: In function 'ufs_mtk_mcq_set_irq_affinity':
>> drivers/ufs/host/ufs-mediatek.c:875:8: error: implicit declaration of function 'irq_set_affinity'; did you mean 'irq_set_vcpu_affinity'? [-Werror=implicit-function-declaration]
875 | ret = irq_set_affinity(irq, cpumask_of(_cpu));
| ^~~~~~~~~~~~~~~~
| irq_set_vcpu_affinity
drivers/ufs/host/ufs-mediatek.c: In function 'ufs_mtk_config_mcq_irq':
>> drivers/ufs/host/ufs-mediatek.c:2264:9: error: implicit declaration of function 'devm_request_irq'; did you mean 'can_request_irq'? [-Werror=implicit-function-declaration]
2264 | ret = devm_request_irq(hba->dev, irq, ufs_mtk_mcq_intr, 0, UFSHCD,
| ^~~~~~~~~~~~~~~~
| can_request_irq
cc1: some warnings being treated as errors
vim +760 drivers/ufs/host/ufs-mediatek.c
54770cbebe2caa8 drivers/scsi/ufs/ufs-mediatek.c Stanley Chu 2020-11-16 746
e0dc13e5a3cb9de drivers/ufs/host/ufs-mediatek.c Peter Wang 2023-12-21 747 static void ufs_mtk_mcq_disable_irq(struct ufs_hba *hba)
e0dc13e5a3cb9de drivers/ufs/host/ufs-mediatek.c Peter Wang 2023-12-21 748 {
e0dc13e5a3cb9de drivers/ufs/host/ufs-mediatek.c Peter Wang 2023-12-21 749 struct ufs_mtk_host *host = ufshcd_get_variant(hba);
e0dc13e5a3cb9de drivers/ufs/host/ufs-mediatek.c Peter Wang 2023-12-21 750 u32 irq, i;
e0dc13e5a3cb9de drivers/ufs/host/ufs-mediatek.c Peter Wang 2023-12-21 751
0fca3318e550d48 drivers/ufs/host/ufs-mediatek.c Bart Van Assche 2024-07-08 752 if (!hba->mcq_enabled)
e0dc13e5a3cb9de drivers/ufs/host/ufs-mediatek.c Peter Wang 2023-12-21 753 return;
e0dc13e5a3cb9de drivers/ufs/host/ufs-mediatek.c Peter Wang 2023-12-21 754
e0dc13e5a3cb9de drivers/ufs/host/ufs-mediatek.c Peter Wang 2023-12-21 755 if (host->mcq_nr_intr == 0)
e0dc13e5a3cb9de drivers/ufs/host/ufs-mediatek.c Peter Wang 2023-12-21 756 return;
e0dc13e5a3cb9de drivers/ufs/host/ufs-mediatek.c Peter Wang 2023-12-21 757
e0dc13e5a3cb9de drivers/ufs/host/ufs-mediatek.c Peter Wang 2023-12-21 758 for (i = 0; i < host->mcq_nr_intr; i++) {
e0dc13e5a3cb9de drivers/ufs/host/ufs-mediatek.c Peter Wang 2023-12-21 759 irq = host->mcq_intr_info[i].irq;
e0dc13e5a3cb9de drivers/ufs/host/ufs-mediatek.c Peter Wang 2023-12-21 @760 disable_irq(irq);
e0dc13e5a3cb9de drivers/ufs/host/ufs-mediatek.c Peter Wang 2023-12-21 761 }
e0dc13e5a3cb9de drivers/ufs/host/ufs-mediatek.c Peter Wang 2023-12-21 762 host->is_mcq_intr_enabled = false;
e0dc13e5a3cb9de drivers/ufs/host/ufs-mediatek.c Peter Wang 2023-12-21 763 }
e0dc13e5a3cb9de drivers/ufs/host/ufs-mediatek.c Peter Wang 2023-12-21 764
e0dc13e5a3cb9de drivers/ufs/host/ufs-mediatek.c Peter Wang 2023-12-21 765 static void ufs_mtk_mcq_enable_irq(struct ufs_hba *hba)
e0dc13e5a3cb9de drivers/ufs/host/ufs-mediatek.c Peter Wang 2023-12-21 766 {
e0dc13e5a3cb9de drivers/ufs/host/ufs-mediatek.c Peter Wang 2023-12-21 767 struct ufs_mtk_host *host = ufshcd_get_variant(hba);
e0dc13e5a3cb9de drivers/ufs/host/ufs-mediatek.c Peter Wang 2023-12-21 768 u32 irq, i;
e0dc13e5a3cb9de drivers/ufs/host/ufs-mediatek.c Peter Wang 2023-12-21 769
0fca3318e550d48 drivers/ufs/host/ufs-mediatek.c Bart Van Assche 2024-07-08 770 if (!hba->mcq_enabled)
e0dc13e5a3cb9de drivers/ufs/host/ufs-mediatek.c Peter Wang 2023-12-21 771 return;
e0dc13e5a3cb9de drivers/ufs/host/ufs-mediatek.c Peter Wang 2023-12-21 772
e0dc13e5a3cb9de drivers/ufs/host/ufs-mediatek.c Peter Wang 2023-12-21 773 if (host->mcq_nr_intr == 0)
e0dc13e5a3cb9de drivers/ufs/host/ufs-mediatek.c Peter Wang 2023-12-21 774 return;
e0dc13e5a3cb9de drivers/ufs/host/ufs-mediatek.c Peter Wang 2023-12-21 775
e0dc13e5a3cb9de drivers/ufs/host/ufs-mediatek.c Peter Wang 2023-12-21 776 if (host->is_mcq_intr_enabled == true)
e0dc13e5a3cb9de drivers/ufs/host/ufs-mediatek.c Peter Wang 2023-12-21 777 return;
e0dc13e5a3cb9de drivers/ufs/host/ufs-mediatek.c Peter Wang 2023-12-21 778
e0dc13e5a3cb9de drivers/ufs/host/ufs-mediatek.c Peter Wang 2023-12-21 779 for (i = 0; i < host->mcq_nr_intr; i++) {
e0dc13e5a3cb9de drivers/ufs/host/ufs-mediatek.c Peter Wang 2023-12-21 780 irq = host->mcq_intr_info[i].irq;
e0dc13e5a3cb9de drivers/ufs/host/ufs-mediatek.c Peter Wang 2023-12-21 @781 enable_irq(irq);
e0dc13e5a3cb9de drivers/ufs/host/ufs-mediatek.c Peter Wang 2023-12-21 782 }
e0dc13e5a3cb9de drivers/ufs/host/ufs-mediatek.c Peter Wang 2023-12-21 783 host->is_mcq_intr_enabled = true;
e0dc13e5a3cb9de drivers/ufs/host/ufs-mediatek.c Peter Wang 2023-12-21 784 }
e0dc13e5a3cb9de drivers/ufs/host/ufs-mediatek.c Peter Wang 2023-12-21 785
ddd90623ce26ea8 drivers/scsi/ufs/ufs-mediatek.c Stanley Chu 2019-03-16 786 /**
ddd90623ce26ea8 drivers/scsi/ufs/ufs-mediatek.c Stanley Chu 2019-03-16 787 * ufs_mtk_setup_clocks - enables/disable clocks
ddd90623ce26ea8 drivers/scsi/ufs/ufs-mediatek.c Stanley Chu 2019-03-16 788 * @hba: host controller instance
ddd90623ce26ea8 drivers/scsi/ufs/ufs-mediatek.c Stanley Chu 2019-03-16 789 * @on: If true, enable clocks else disable them.
ddd90623ce26ea8 drivers/scsi/ufs/ufs-mediatek.c Stanley Chu 2019-03-16 790 * @status: PRE_CHANGE or POST_CHANGE notify
ddd90623ce26ea8 drivers/scsi/ufs/ufs-mediatek.c Stanley Chu 2019-03-16 791 *
3a17fefe0f1960d drivers/ufs/host/ufs-mediatek.c Bart Van Assche 2023-07-27 792 * Return: 0 on success, non-zero on failure.
ddd90623ce26ea8 drivers/scsi/ufs/ufs-mediatek.c Stanley Chu 2019-03-16 793 */
ddd90623ce26ea8 drivers/scsi/ufs/ufs-mediatek.c Stanley Chu 2019-03-16 794 static int ufs_mtk_setup_clocks(struct ufs_hba *hba, bool on,
ddd90623ce26ea8 drivers/scsi/ufs/ufs-mediatek.c Stanley Chu 2019-03-16 795 enum ufs_notify_change_status status)
ddd90623ce26ea8 drivers/scsi/ufs/ufs-mediatek.c Stanley Chu 2019-03-16 796 {
ddd90623ce26ea8 drivers/scsi/ufs/ufs-mediatek.c Stanley Chu 2019-03-16 797 struct ufs_mtk_host *host = ufshcd_get_variant(hba);
561e3a8726b2dd9 drivers/scsi/ufs/ufs-mediatek.c Stanley Chu 2020-06-01 798 bool clk_pwr_off = false;
cf137b3ea49a04e drivers/scsi/ufs/ufs-mediatek.c Stanley Chu 2020-10-29 799 int ret = 0;
ddd90623ce26ea8 drivers/scsi/ufs/ufs-mediatek.c Stanley Chu 2019-03-16 800
ddd90623ce26ea8 drivers/scsi/ufs/ufs-mediatek.c Stanley Chu 2019-03-16 801 /*
ddd90623ce26ea8 drivers/scsi/ufs/ufs-mediatek.c Stanley Chu 2019-03-16 802 * In case ufs_mtk_init() is not yet done, simply ignore.
ddd90623ce26ea8 drivers/scsi/ufs/ufs-mediatek.c Stanley Chu 2019-03-16 803 * This ufs_mtk_setup_clocks() shall be called from
ddd90623ce26ea8 drivers/scsi/ufs/ufs-mediatek.c Stanley Chu 2019-03-16 804 * ufs_mtk_init() after init is done.
ddd90623ce26ea8 drivers/scsi/ufs/ufs-mediatek.c Stanley Chu 2019-03-16 805 */
ddd90623ce26ea8 drivers/scsi/ufs/ufs-mediatek.c Stanley Chu 2019-03-16 806 if (!host)
ddd90623ce26ea8 drivers/scsi/ufs/ufs-mediatek.c Stanley Chu 2019-03-16 807 return 0;
ddd90623ce26ea8 drivers/scsi/ufs/ufs-mediatek.c Stanley Chu 2019-03-16 808
722adbbd706569b drivers/scsi/ufs/ufs-mediatek.c Stanley Chu 2020-01-29 809 if (!on && status == PRE_CHANGE) {
561e3a8726b2dd9 drivers/scsi/ufs/ufs-mediatek.c Stanley Chu 2020-06-01 810 if (ufshcd_is_link_off(hba)) {
561e3a8726b2dd9 drivers/scsi/ufs/ufs-mediatek.c Stanley Chu 2020-06-01 811 clk_pwr_off = true;
561e3a8726b2dd9 drivers/scsi/ufs/ufs-mediatek.c Stanley Chu 2020-06-01 812 } else if (ufshcd_is_link_hibern8(hba) ||
561e3a8726b2dd9 drivers/scsi/ufs/ufs-mediatek.c Stanley Chu 2020-06-01 813 (!ufshcd_can_hibern8_during_gating(hba) &&
561e3a8726b2dd9 drivers/scsi/ufs/ufs-mediatek.c Stanley Chu 2020-06-01 814 ufshcd_is_auto_hibern8_enabled(hba))) {
722adbbd706569b drivers/scsi/ufs/ufs-mediatek.c Stanley Chu 2020-01-29 815 /*
561e3a8726b2dd9 drivers/scsi/ufs/ufs-mediatek.c Stanley Chu 2020-06-01 816 * Gate ref-clk and poweroff mphy if link state is in
561e3a8726b2dd9 drivers/scsi/ufs/ufs-mediatek.c Stanley Chu 2020-06-01 817 * OFF or Hibern8 by either Auto-Hibern8 or
561e3a8726b2dd9 drivers/scsi/ufs/ufs-mediatek.c Stanley Chu 2020-06-01 818 * ufshcd_link_state_transition().
722adbbd706569b drivers/scsi/ufs/ufs-mediatek.c Stanley Chu 2020-01-29 819 */
9006e3986f66898 drivers/scsi/ufs/ufs-mediatek.c Stanley Chu 2020-06-01 820 ret = ufs_mtk_wait_link_state(hba,
9006e3986f66898 drivers/scsi/ufs/ufs-mediatek.c Stanley Chu 2020-06-01 821 VS_LINK_HIBERN8,
9006e3986f66898 drivers/scsi/ufs/ufs-mediatek.c Stanley Chu 2020-06-01 822 15);
9006e3986f66898 drivers/scsi/ufs/ufs-mediatek.c Stanley Chu 2020-06-01 823 if (!ret)
561e3a8726b2dd9 drivers/scsi/ufs/ufs-mediatek.c Stanley Chu 2020-06-01 824 clk_pwr_off = true;
97347214bce8d74 drivers/scsi/ufs/ufs-mediatek.c Stanley Chu 2019-12-30 825 }
561e3a8726b2dd9 drivers/scsi/ufs/ufs-mediatek.c Stanley Chu 2020-06-01 826
f91c6c70d103a61 drivers/ufs/host/ufs-mediatek.c Peter Wang 2025-08-11 827 if (clk_pwr_off) {
c64c487d953331d drivers/ufs/host/ufs-mediatek.c Peter Wang 2022-06-23 828 ufs_mtk_pwr_ctrl(hba, false);
f91c6c70d103a61 drivers/ufs/host/ufs-mediatek.c Peter Wang 2025-08-11 829 } else {
f91c6c70d103a61 drivers/ufs/host/ufs-mediatek.c Peter Wang 2025-08-11 830 dev_warn(hba->dev, "Clock is not turned off, hba->ahit = 0x%x, AHIT = 0x%x\n",
f91c6c70d103a61 drivers/ufs/host/ufs-mediatek.c Peter Wang 2025-08-11 831 hba->ahit,
f91c6c70d103a61 drivers/ufs/host/ufs-mediatek.c Peter Wang 2025-08-11 832 ufshcd_readl(hba,
f91c6c70d103a61 drivers/ufs/host/ufs-mediatek.c Peter Wang 2025-08-11 833 REG_AUTO_HIBERNATE_IDLE_TIMER));
f91c6c70d103a61 drivers/ufs/host/ufs-mediatek.c Peter Wang 2025-08-11 834 }
e0dc13e5a3cb9de drivers/ufs/host/ufs-mediatek.c Peter Wang 2023-12-21 835 ufs_mtk_mcq_disable_irq(hba);
722adbbd706569b drivers/scsi/ufs/ufs-mediatek.c Stanley Chu 2020-01-29 836 } else if (on && status == POST_CHANGE) {
c64c487d953331d drivers/ufs/host/ufs-mediatek.c Peter Wang 2022-06-23 837 ufs_mtk_pwr_ctrl(hba, true);
e0dc13e5a3cb9de drivers/ufs/host/ufs-mediatek.c Peter Wang 2023-12-21 838 ufs_mtk_mcq_enable_irq(hba);
97347214bce8d74 drivers/scsi/ufs/ufs-mediatek.c Stanley Chu 2019-12-30 839 }
ddd90623ce26ea8 drivers/scsi/ufs/ufs-mediatek.c Stanley Chu 2019-03-16 840
ddd90623ce26ea8 drivers/scsi/ufs/ufs-mediatek.c Stanley Chu 2019-03-16 841 return ret;
ddd90623ce26ea8 drivers/scsi/ufs/ufs-mediatek.c Stanley Chu 2019-03-16 842 }
ddd90623ce26ea8 drivers/scsi/ufs/ufs-mediatek.c Stanley Chu 2019-03-16 843
66e26a4b8a77931 drivers/ufs/host/ufs-mediatek.c Peter Wang 2025-07-22 844 static u32 ufs_mtk_mcq_get_irq(struct ufs_hba *hba, unsigned int cpu)
66e26a4b8a77931 drivers/ufs/host/ufs-mediatek.c Peter Wang 2025-07-22 845 {
66e26a4b8a77931 drivers/ufs/host/ufs-mediatek.c Peter Wang 2025-07-22 846 struct ufs_mtk_host *host = ufshcd_get_variant(hba);
66e26a4b8a77931 drivers/ufs/host/ufs-mediatek.c Peter Wang 2025-07-22 847 struct blk_mq_tag_set *tag_set = &hba->host->tag_set;
66e26a4b8a77931 drivers/ufs/host/ufs-mediatek.c Peter Wang 2025-07-22 848 struct blk_mq_queue_map *map = &tag_set->map[HCTX_TYPE_DEFAULT];
66e26a4b8a77931 drivers/ufs/host/ufs-mediatek.c Peter Wang 2025-07-22 849 unsigned int nr = map->nr_queues;
66e26a4b8a77931 drivers/ufs/host/ufs-mediatek.c Peter Wang 2025-07-22 850 unsigned int q_index;
66e26a4b8a77931 drivers/ufs/host/ufs-mediatek.c Peter Wang 2025-07-22 851
66e26a4b8a77931 drivers/ufs/host/ufs-mediatek.c Peter Wang 2025-07-22 852 q_index = map->mq_map[cpu];
7ec2bd6cd2d0ce6 drivers/ufs/host/ufs-mediatek.c Peter Wang 2025-08-04 853 if (q_index >= nr) {
66e26a4b8a77931 drivers/ufs/host/ufs-mediatek.c Peter Wang 2025-07-22 854 dev_err(hba->dev, "hwq index %d exceed %d\n",
66e26a4b8a77931 drivers/ufs/host/ufs-mediatek.c Peter Wang 2025-07-22 855 q_index, nr);
66e26a4b8a77931 drivers/ufs/host/ufs-mediatek.c Peter Wang 2025-07-22 856 return MTK_MCQ_INVALID_IRQ;
66e26a4b8a77931 drivers/ufs/host/ufs-mediatek.c Peter Wang 2025-07-22 857 }
66e26a4b8a77931 drivers/ufs/host/ufs-mediatek.c Peter Wang 2025-07-22 858
66e26a4b8a77931 drivers/ufs/host/ufs-mediatek.c Peter Wang 2025-07-22 859 return host->mcq_intr_info[q_index].irq;
66e26a4b8a77931 drivers/ufs/host/ufs-mediatek.c Peter Wang 2025-07-22 860 }
66e26a4b8a77931 drivers/ufs/host/ufs-mediatek.c Peter Wang 2025-07-22 861
66e26a4b8a77931 drivers/ufs/host/ufs-mediatek.c Peter Wang 2025-07-22 862 static void ufs_mtk_mcq_set_irq_affinity(struct ufs_hba *hba, unsigned int cpu)
66e26a4b8a77931 drivers/ufs/host/ufs-mediatek.c Peter Wang 2025-07-22 863 {
66e26a4b8a77931 drivers/ufs/host/ufs-mediatek.c Peter Wang 2025-07-22 864 unsigned int irq, _cpu;
66e26a4b8a77931 drivers/ufs/host/ufs-mediatek.c Peter Wang 2025-07-22 865 int ret;
66e26a4b8a77931 drivers/ufs/host/ufs-mediatek.c Peter Wang 2025-07-22 866
66e26a4b8a77931 drivers/ufs/host/ufs-mediatek.c Peter Wang 2025-07-22 867 irq = ufs_mtk_mcq_get_irq(hba, cpu);
66e26a4b8a77931 drivers/ufs/host/ufs-mediatek.c Peter Wang 2025-07-22 868 if (irq == MTK_MCQ_INVALID_IRQ) {
66e26a4b8a77931 drivers/ufs/host/ufs-mediatek.c Peter Wang 2025-07-22 869 dev_err(hba->dev, "invalid irq. unable to bind irq to cpu%d", cpu);
66e26a4b8a77931 drivers/ufs/host/ufs-mediatek.c Peter Wang 2025-07-22 870 return;
66e26a4b8a77931 drivers/ufs/host/ufs-mediatek.c Peter Wang 2025-07-22 871 }
66e26a4b8a77931 drivers/ufs/host/ufs-mediatek.c Peter Wang 2025-07-22 872
66e26a4b8a77931 drivers/ufs/host/ufs-mediatek.c Peter Wang 2025-07-22 873 /* force migrate irq of cpu0 to cpu3 */
66e26a4b8a77931 drivers/ufs/host/ufs-mediatek.c Peter Wang 2025-07-22 874 _cpu = (cpu == 0) ? 3 : cpu;
66e26a4b8a77931 drivers/ufs/host/ufs-mediatek.c Peter Wang 2025-07-22 @875 ret = irq_set_affinity(irq, cpumask_of(_cpu));
66e26a4b8a77931 drivers/ufs/host/ufs-mediatek.c Peter Wang 2025-07-22 876 if (ret) {
66e26a4b8a77931 drivers/ufs/host/ufs-mediatek.c Peter Wang 2025-07-22 877 dev_err(hba->dev, "set irq %d affinity to CPU %d failed\n",
66e26a4b8a77931 drivers/ufs/host/ufs-mediatek.c Peter Wang 2025-07-22 878 irq, _cpu);
66e26a4b8a77931 drivers/ufs/host/ufs-mediatek.c Peter Wang 2025-07-22 879 return;
66e26a4b8a77931 drivers/ufs/host/ufs-mediatek.c Peter Wang 2025-07-22 880 }
66e26a4b8a77931 drivers/ufs/host/ufs-mediatek.c Peter Wang 2025-07-22 881 dev_info(hba->dev, "set irq %d affinity to CPU: %d\n", irq, _cpu);
66e26a4b8a77931 drivers/ufs/host/ufs-mediatek.c Peter Wang 2025-07-22 882 }
66e26a4b8a77931 drivers/ufs/host/ufs-mediatek.c Peter Wang 2025-07-22 883
:::::: The code at line 760 was first introduced by commit
:::::: e0dc13e5a3cb9de98fd00b7718738f9eef4bd0ce scsi: ufs: ufs-mediatek: Disable MCQ IRQ when clock off
:::::: TO: Peter Wang <peter.wang@mediatek.com>
:::::: CC: Martin K. Petersen <martin.petersen@oracle.com>
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
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