Re: [PATCH] drm/amd/display: Restore self-refresh fallback in DCN21 bandwidth validation

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Reverting `allow_self_refresh_only` to `true` reintroduces a known `flip_done` timeout regression for MPO configurations because the underlying state consistency issue remains unfixed.
--

--- Patch [1]: [PATCH] drm/amd/display: Restore self-refresh fallback in DCN21 bandwidth validation ---
commit a448c5ed2983960ea5f4923032f3c31614dd4ecb
Author: Julien Le Bourg <julien.lebourg8@gmail.com>

drm/amd/display: Restore self-refresh fallback in DCN21 bandwidth validation
    
This commit restores the self-refresh fallback in DCN21 bandwidth validation 
by passing true for allow_self_refresh_only to dcn21_fast_validate_bw(). This 
resolves an issue where high refresh rate modes with short vertical blanking 
were rejected on eDP panels.

> diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c b/drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c
> index 38c79239004c4..426e9c03fabc6 100644
> --- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c
> +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c
> @@ -2347,7 +2347,8 @@ bool dcn21_validate_bandwidth_fp(struct dc *dc, struct dc_state *context,
>  	/*Unsafe due to current pipe merge and split logic*/
>  	ASSERT(context != dc->current_state);
>  
> -	out = dcn21_fast_validate_bw(dc, context, pipes, &pipe_cnt, pipe_split_from, &vlevel, validate_mode, false);
> +	out = dcn21_fast_validate_bw(dc, context, pipes, &pipe_cnt, pipe_split_from,
> +				     &vlevel, validate_mode, true);

[Severity: High]
Does reverting this to true reintroduce the flip_done timeout regression for
MPO configurations?

Since the underlying state consistency issue remains unfixed, it seems
calculate_wm_set_for_vlevel() still overwrites sr_exit_time_us but never
restores it:

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c:calculate_wm_set_for_vlevel() {
    ...
    dml->soc.sr_exit_time_us = table_entry->sr_exit_time_us;
    dml->soc.sr_enter_plus_exit_time_us = table_entry->sr_enter_plus_exit_time_us;
    ...
}

This state leak into dc->current_state causes the next atomic_check to copy
the corrupted state, leading to a flip_done timeout when bandwidth validation
fails during atomic_commit_tail.

>  
>  	if (pipe_cnt == 0)
>  		goto validate_out;

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260822091715.6692-1-julien.lebourg8@gmail.com?part=1