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From: sashiko-bot@kernel.org
To: "Harendra Gautam" <harendra.gautam@oss.qualcomm.com>
Cc: conor+dt@kernel.org, robh@kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v3 1/9] ASoC: dt-bindings: qcom,qaif-cpu: Add binding
Date: Mon, 24 Aug 2026 06:46:24 +0000	[thread overview]
Message-ID: <20260824064624.C62C51F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260824063627.3595610-2-harendra.gautam@oss.qualcomm.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] The `clocks` and `clock-names` properties are artificially restricted to a maximum of 4 per-AIF bit clocks, preventing the configuration of AIF interfaces 4 through 12.
--

--- Patch [1]: [PATCH v3 1/9] ASoC: dt-bindings: qcom,qaif-cpu: Add binding ---
commit 4490a4ebecf0bd52b36566a5c2160dea592dd645
Author: Harendra Gautam <harendra.gautam@oss.qualcomm.com>

ASoC: dt-bindings: qcom,qaif-cpu: Add binding
    
This commit adds the device tree binding for the Qualcomm Audio Interface
(QAIF) CPU DAI controller. It describes the controller resources, AIF
interfaces, and named DAI constants for the sound card nodes.

> diff --git a/Documentation/devicetree/bindings/sound/qcom,qaif-cpu.yaml b/Documentation/devicetree/bindings/sound/qcom,qaif-cpu.yaml
> new file mode 100644
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/sound/qcom,qaif-cpu.yaml
[ ... ]
> +  clocks:
> +    minItems: 5
> +    maxItems: 9
> +
> +  clock-names:
> +    description:
> +      The first five clocks are always required. Any further entries are the
> +      per-AIF bit clocks (aif_if<N>_ibit), supplied in order starting from
> +      AIF interface 0 for as many serial AIF interfaces as the board uses.
> +    minItems: 5
> +    items:
> +      - const: lpass_config
> +      - const: lpass_core_axim
> +      - const: aud_dma
> +      - const: aud_dma_mem
> +      - const: bus
> +      - const: aif_if0_ibit
> +      - const: aif_if1_ibit
> +      - const: aif_if2_ibit
> +      - const: aif_if3_ibit

[Severity: Medium]
The description states the hardware supports up to 13 multi-lane Unified Audio
Interfaces, but the clocks property is restricted to a maximum of 9 items.
Does this artificially prevent the configuration of aif_if4_ibit through
aif_if12_ibit?

Any board attempting to configure AIF4 or higher would fail dt_binding_check
because the clock-names list is capped at aif_if3_ibit. Should maxItems and
the items list be expanded to accommodate all 13 possible interfaces?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260824063627.3595610-1-harendra.gautam@oss.qualcomm.com?part=1

  reply	other threads:[~2026-08-24  6:46 UTC|newest]

Thread overview: 49+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-24  6:36 [PATCH v3 0/9] ASoC: qcom: Add QAIF driver for Shikra audio platform Harendra Gautam
2026-08-24  6:36 ` [PATCH v3 1/9] ASoC: dt-bindings: qcom,qaif-cpu: Add binding Harendra Gautam
2026-08-24  6:46   ` sashiko-bot [this message]
2026-08-24  8:39   ` Manuel Ebner
2026-08-24  9:14     ` Harendra Gautam
2026-08-25  5:59     ` Krzysztof Kozlowski
2026-08-26  8:31   ` Mohammad Rafi Shaik
2026-08-26  9:39     ` Harendra Gautam
2026-08-26  9:43       ` Srinivas Kandagatla
2026-08-26  9:55         ` Harendra Gautam
2026-08-26 10:01           ` Srinivas Kandagatla
2026-08-26 10:06             ` Harendra Gautam
2026-08-26 10:25               ` Harendra Gautam
2026-08-28  8:58             ` Harendra Gautam
2026-08-28 12:37               ` Srinivas Kandagatla
2026-08-28 12:42                 ` Srinivas Kandagatla
2026-08-29  9:10                   ` Harendra Gautam
2026-09-01  5:11                   ` Prasad Kumpatla
2026-09-01  7:57                     ` Harendra Gautam
2026-08-26 23:32     ` Mark Brown
2026-08-27  4:00       ` Harendra Gautam
2026-09-01  6:14   ` Prasad Kumpatla
2026-09-01  8:06     ` Harendra Gautam
2026-09-01 11:59       ` Krzysztof Kozlowski
2026-09-01 14:46         ` Harendra Gautam
2026-09-01 14:56           ` Krzysztof Kozlowski
2026-09-01 16:31             ` Harendra Gautam
2026-08-24  6:36 ` [PATCH v3 2/9] ASoC: qcom: Add QAIF shared data structures and variant interface Harendra Gautam
2026-08-24  6:36 ` [PATCH v3 3/9] ASoC: qcom: Add QAIF hardware register map Harendra Gautam
2026-08-24  6:48   ` sashiko-bot
2026-08-24  6:36 ` [PATCH v3 4/9] ASoC: qcom: Add QAIF CPU DAI ops, regmap, DT parsing and platform init Harendra Gautam
2026-08-24  6:49   ` sashiko-bot
2026-08-24  6:36 ` [PATCH v3 5/9] ASoC: soc-core: Add snd_soc_of_xlate_dai_name() generic helper Harendra Gautam
2026-08-25  4:20   ` Kuninori Morimoto
2026-08-24  6:36 ` [PATCH v3 6/9] ASoC: qcom: Add QAIF PCM operations Harendra Gautam
2026-08-24  6:53   ` sashiko-bot
2026-08-24  9:25   ` Markus Elfring
2026-08-24 10:10     ` Harendra Gautam
2026-08-25  6:07       ` Krzysztof Kozlowski
2026-08-24  6:36 ` [PATCH v3 7/9] ASoC: qcom: Add QAIF IRQ handling, suspend/resume and platform register Harendra Gautam
2026-08-24  6:53   ` sashiko-bot
2026-08-24  6:36 ` [PATCH v3 8/9] ASoC: qcom: Add Shikra QAIF support Harendra Gautam
2026-08-26  8:35   ` Mohammad Rafi Shaik
2026-08-26  8:58     ` Harendra Gautam
2026-08-26 10:13       ` Srinivas Kandagatla
2026-08-26 10:37         ` Harendra Gautam
2026-08-24  6:36 ` [PATCH v3 9/9] MAINTAINERS: Add Qualcomm QAIF driver entry Harendra Gautam
2026-08-24  8:22   ` Abel Vesa
2026-08-24  8:31     ` Harendra Gautam

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