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Ip=[165.204.84.17]; Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000AD7E.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS3PR12MB999218 X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" The fatal error interrupt is broadcast to every device of the hive and they all race for amdgpu_ras_global_ras_isr(), which hands -EBUSY to everyone but the winner. Treating that as a failure returns before the device is marked, so seven devices out of eight are left without their fatal and SRAM ECC state, the one that actually logged the error among them. KFD then tells the processes on those devices that the reset was a plain hang. -EBUSY only means the reset has already been asked for. Record the state anyway and leave the request to the winner. Signed-off-by: Xiang Liu --- drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_sys.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_sys.c b/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_sys.c index 081516c46cf8..291b2a96cbb5 100644 --- a/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_sys.c +++ b/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_sys.c @@ -33,8 +33,14 @@ static int amdgpu_ras_sys_detect_fatal_event(struct ras_core_context *ras_core, uint64_t seq_no; ret = amdgpu_ras_global_ras_isr(adev); - if (ret) - return ret; + if (ret) { + /* Another device of the hive already asked for the reset, this + * one still has to record that it saw the error. + */ + kgd2kfd_set_sram_ecc_flag(adev->kfd.dev); + amdgpu_ras_set_fed(adev, true); + return ret == -EBUSY ? 0 : ret; + } seq_no = amdgpu_ras_mgr_gen_ras_event_seqno(adev, RAS_SEQNO_TYPE_UE); RAS_DEV_INFO(adev, -- 2.34.1