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From: sashiko-bot@kernel.org
To: "Jyothi Kumar Seerapu" <jyothi.seerapu@oss.qualcomm.com>
Cc: vkoul@kernel.org, Frank.Li@kernel.org, dmaengine@vger.kernel.org
Subject: Re: [PATCH 2/2] i2c: qcom-geni: Add support for I2C High-Speed mode
Date: Mon, 24 Aug 2026 11:39:58 +0000	[thread overview]
Message-ID: <20260824113959.2D64D1F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260824-i2c-hs-v1-2-8dd94e5c6113@oss.qualcomm.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Missing I2C_HS_WRITE checks in geni_i2c_gpi() cause unintended TX DMA mapping for read messages and out-of-bounds array accesses.
--

--- Patch [2]: [PATCH 2/2] i2c: qcom-geni: Add support for I2C High-Speed mode ---
commit 010ffaa50c8bd9bb0e57a40b999e343cea742bb8
Author: Jyothi Kumar Seerapu <jyothi.seerapu@oss.qualcomm.com>

i2c: qcom-geni: Add support for I2C High-Speed mode

Implement I2C High-Speed (HS) mode for the Qualcomm GENI I2C controller.
Detect HS mode requests based on 3.4 MHz frequency and configure the
hardware accordingly.

> diff --git a/drivers/i2c/busses/i2c-qcom-geni.c b/drivers/i2c/busses/i2c-qcom-geni.c
> index 658636c1ee0e2..3712e0dd9e68d 100644
> --- a/drivers/i2c/busses/i2c-qcom-geni.c
> +++ b/drivers/i2c/busses/i2c-qcom-geni.c
[ ... ]
> @@ -700,7 +756,7 @@ static int geni_i2c_gpi(struct geni_i2c_dev *gi2c, struct i2c_msg msgs[],
>  		goto out;
>  	}
>  
> -	if (op == I2C_WRITE)
> +	if (op == I2C_WRITE || op == I2C_HS_WRITE)
>  		map_dirn = DMA_TO_DEVICE;
>  	else
>  		map_dirn = DMA_FROM_DEVICE;

[Severity: High]
Will this cause unintended TX DMA mapping and out-of-bounds array accesses
for High-Speed mode read messages?

It looks like op == I2C_HS_WRITE was added here for map_dirn, but it wasn't
added to the check that skips TX DMA mapping for read messages earlier in
this function:

    if (op == I2C_WRITE && msgs[msg_idx].flags & I2C_M_RD) {
            peripheral->multi_msg = true;
            goto skip_tx_dma_map;
    }

Because I2C_HS_WRITE isn't checked here, High-Speed reads will fail to skip
the TX DMA mapping.

Additionally, it appears the same omission happens later in the function
when incrementing msg_idx_cnt:

    if (!((msgs[msg_idx].flags & I2C_M_RD) && op == I2C_WRITE))
            gi2c_gpi_xfer->msg_idx_cnt++;

Since I2C_HS_WRITE is missing, the counter will be prematurely incremented
for HS reads. When the subsequent RX call processes the read message with
I2C_HS_READ, it will use the incremented msg_idx_cnt, potentially pointing
out of bounds of the msgs array.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260824-i2c-hs-v1-0-8dd94e5c6113@oss.qualcomm.com?part=2

  reply	other threads:[~2026-08-24 11:39 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-24 11:25 [PATCH 0/2] i2c: Add I2C High-Speed mode support for qcom-geni Jyothi Kumar Seerapu
2026-08-24 11:25 ` [PATCH 1/2] dmaengine: qcom-gpi: Add I2C High-Speed mode configuration support Jyothi Kumar Seerapu
2026-08-24 11:36   ` sashiko-bot
2026-08-25 20:31     ` Frank Li
2026-08-26  6:22       ` Jyothi Kumar Seerapu
2026-08-27 19:26   ` Mukesh Savaliya
2026-09-07 16:16     ` Jyothi Kumar Seerapu
2026-08-24 11:25 ` [PATCH 2/2] i2c: qcom-geni: Add support for I2C High-Speed mode Jyothi Kumar Seerapu
2026-08-24 11:39   ` sashiko-bot [this message]
2026-08-27 19:42   ` Mukesh Savaliya
2026-09-07 16:14     ` Jyothi Kumar Seerapu
2026-08-27 19:26 ` [PATCH 0/2] i2c: Add I2C High-Speed mode support for qcom-geni Mukesh Savaliya
2026-09-07 16:14   ` Jyothi Kumar Seerapu

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