From: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
To: intel-xe@lists.freedesktop.org
Cc: himal.prasad.ghimiray@intel.com,
Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
Subject: [PATCH v2 3/7] drm/xe/guc: Print register addresses in capture snapshot output
Date: Tue, 25 Aug 2026 00:13:52 +0530 [thread overview]
Message-ID: <20260824184356.1960708-4-naresh.kumar.g@intel.com> (raw)
In-Reply-To: <20260824184356.1960708-1-naresh.kumar.g@intel.com>
Include register offsets in GuC capture snapshot print output for both
32-bit and 64-bit registers.
When dumping captured engine register state, print each register name
alongside its MMIO offset to make the snapshot output easier to
cross-reference with register definitions and hardware debug
documentation.
This improves postmortem analysis without changing capture contents.
v2:(Sashiko)
- Ensure lower DWORD prints
Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
---
drivers/gpu/drm/xe/xe_guc_capture.c | 11 +++++++----
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_guc_capture.c b/drivers/gpu/drm/xe/xe_guc_capture.c
index 82df19b304e1..324f25af3b0d 100644
--- a/drivers/gpu/drm/xe/xe_guc_capture.c
+++ b/drivers/gpu/drm/xe/xe_guc_capture.c
@@ -1774,7 +1774,9 @@ snapshot_print_by_list_order(struct xe_hw_engine_snapshot *snapshot, struct drm_
XE_WARN_ON(!low32_ready);
low32_ready = false;
- drm_printf(p, "\t%s: 0x%016llx\n", reg_desc->regname, value_qw);
+ drm_printf(p, "\t%s (0x%lx): 0x%016llx\n", reg_desc->regname,
+ reg_desc->reg.addr - sizeof(u32),
+ value_qw);
break;
}
@@ -1788,10 +1790,11 @@ snapshot_print_by_list_order(struct xe_hw_engine_snapshot *snapshot, struct drm_
XE_WARN_ON(low32_ready);
if (FIELD_GET(GUC_REGSET_STEERING_NEEDED, reg_desc->flags))
- drm_printf(p, "\t%s[%u]: 0x%08x\n", reg_desc->regname,
- reg_desc->dss_id, value);
+ drm_printf(p, "\t%s[%u] (0x%x): 0x%08x\n", reg_desc->regname,
+ reg_desc->dss_id, reg_desc->reg.addr, value);
else
- drm_printf(p, "\t%s: 0x%08x\n", reg_desc->regname, value);
+ drm_printf(p, "\t%s (0x%x): 0x%08x\n", reg_desc->regname,
+ reg_desc->reg.addr, value);
break;
}
--
2.43.0
next prev parent reply other threads:[~2026-08-24 18:44 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-24 18:43 [PATCH v2 0/7] drm/xe: Capture additional HW register state in devcoredump Nareshkumar Gollakoti
2026-08-24 18:43 ` [PATCH v2 1/7] drm/xe/devcoredump: Capture GT fuse registers " Nareshkumar Gollakoti
2026-08-24 18:57 ` sashiko-bot
2026-08-24 18:43 ` [PATCH v2 2/7] drm/xe/devcoredump: Add GuC register snapshot to devcoredump Nareshkumar Gollakoti
2026-08-24 18:43 ` Nareshkumar Gollakoti [this message]
2026-08-24 19:11 ` [PATCH v2 3/7] drm/xe/guc: Print register addresses in capture snapshot output sashiko-bot
2026-08-24 18:43 ` [PATCH v2 4/7] drm/xe: dump GAM page fault report registers in devcoredump Nareshkumar Gollakoti
2026-08-24 18:43 ` [PATCH v2 5/7] drm/xe/guc: add TDL, SLICE gfx registers to capture list Nareshkumar Gollakoti
2026-08-24 18:43 ` [PATCH v2 6/7] drm/xe: capture L3 node status registers in devcoredump Nareshkumar Gollakoti
2026-08-24 18:43 ` [PATCH v2 7/7] drm/xe/guc: capture additional engine state registers Nareshkumar Gollakoti
2026-08-24 19:35 ` sashiko-bot
2026-08-24 23:50 ` ✓ CI.KUnit: success for drm/xe: Capture additional HW register state in devcoredump (rev2) Patchwork
2026-08-25 0:40 ` ✓ Xe.CI.BAT: " Patchwork
2026-08-25 5:10 ` ✗ Xe.CI.FULL: failure " Patchwork
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