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From: Mauricio Bellon <mauriciobellon@gmail.com>
To: amd-gfx@lists.freedesktop.org
Cc: Wayne Lin <Wayne.Lin@amd.com>,
	Mario Limonciello <mario.limonciello@amd.com>,
	Mauricio Bellon <mbellon@lenovo.com>,
	Harry Wentland <harry.wentland@amd.com>,
	Leo Li <sunpeng.li@amd.com>,
	Rodrigo Siqueira <siqueira@igalia.com>,
	Alex Deucher <alexander.deucher@amd.com>,
	christian.koenig@amd.com, stable@vger.kernel.org
Subject: [PATCH 2/2] drm/amd/display: enable sink DSC before source DSC
Date: Tue, 25 Aug 2026 18:18:19 -0300	[thread overview]
Message-ID: <20260825211819.100210-3-mauriciobellon@gmail.com> (raw)
In-Reply-To: <20260825211819.100210-1-mauriciobellon@gmail.com>

From: Mauricio Bellon <mbellon@lenovo.com>

Direct DisplayPort high-refresh modes using DSC and two-way ODM can
commit without visible output during a 4K120-to-4K144 transition. A
working 4K144 stream can also return black after long-pulse hotplug
reconstruction.

The DPMS-on path currently enables source DSC before link enablement but
does not enable sink DSC until after the source stream is enabled. This
leaves the sink and source compression state ordered differently while
the stream is brought up.

Enable sink DSC immediately before source DSC in the pre-enable phase,
and remove the later redundant sink-enable operation near PPS packet
programming. This establishes the order as sink DSC, source DSC, stream
enablement, and PPS before the compressed stream becomes visible.

Cc: stable@vger.kernel.org
Signed-off-by: Mauricio Bellon <mbellon@lenovo.com>
---
 drivers/gpu/drm/amd/display/dc/link/link_dpms.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/link/link_dpms.c b/drivers/gpu/drm/amd/display/dc/link/link_dpms.c
index 48b086d15..412ce52b3 100644
--- a/drivers/gpu/drm/amd/display/dc/link/link_dpms.c
+++ b/drivers/gpu/drm/amd/display/dc/link/link_dpms.c
@@ -2635,8 +2635,10 @@ static enum dc_status link_set_dpms_on_pre_enable_link(
 	 */
 	if (stream->timing.flags.DSC) {
 		if (dc_is_dp_signal(stream->signal) ||
-			dc_is_virtual_signal(stream->signal))
+			dc_is_virtual_signal(stream->signal)) {
+			dp_set_dsc_on_rx(pipe_ctx, true);
 			link_set_dsc_enable(pipe_ctx, true);
+		}
 	}
 
 	if (link->replay_settings.config.replay_supported && !dc_is_embedded_signal(link->connector_signal))
@@ -2729,7 +2731,6 @@ static enum dc_status link_set_dpms_on_post_enable_link(
 	if (stream->timing.flags.DSC) {
 		if (dc_is_dp_signal(stream->signal) ||
 				dc_is_virtual_signal(stream->signal)) {
-			dp_set_dsc_on_rx(pipe_ctx, true);
 			link_set_dsc_pps_packet(pipe_ctx, true, true);
 		}
 	}
-- 
2.53.0


  parent reply	other threads:[~2026-08-26 12:46 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-25 21:18 [PATCH 0/2] drm/amd/display: stabilize DCN35 ODM and DSC sequencing Mauricio Bellon
2026-08-25 21:18 ` [PATCH 1/2] drm/amd/display: stabilize DCN35 ODM update sequencing Mauricio Bellon
2026-08-25 21:18 ` Mauricio Bellon [this message]
2026-09-08 18:14   ` [PATCH 2/2] drm/amd/display: enable sink DSC before source DSC Zuo, Jerry
2026-09-08 20:00     ` Mauricio Bellon
2026-10-02 20:27       ` Mauricio Bellon
2026-08-25 21:23 ` [PATCH 0/2] drm/amd/display: stabilize DCN35 ODM and DSC sequencing Mario Limonciello

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