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BeAiklw-- X-Sonic-MF: X-Sonic-ID: 902ae9e1-e438-4193-8b6f-e7460e006cb7 Received: from sonic.gate.mail.ne1.yahoo.com by mail-asdoutdeli-p-cin-asso1-prod-sonicconsumer-svc-102 with HTTP; Tue, 25 Aug 2026 22:44:17 +0000 Received: from dip125.lsn.sg3.yahoo.com ([106.10.223.134]) by hello (SMTP) with SMTP ID 692ceff9cbf31ebf3ce1df27c5387b11; Tue, 25 Aug 2026 22:44:13 +0000 (UTC) From: AK Sharma To: u-boot@lists.u-boot-project.org Cc: Christian Marangi , Daniel Schwierzeck , Dario Binacchi , Frieder Schrempf , Jerome Forissier , Marek Vasut , Michael Trimarchi , Tom Rini , AK Sharma Subject: [PATCH v1 09/12] mips: dts: add EcoNet EN75xx device trees Date: Wed, 26 Aug 2026 04:12:04 +0530 Message-ID: <20260825224330.713151-10-maskachoska@yahoo.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260825224330.713151-1-maskachoska@yahoo.com> References: <20260825224330.713151-1-maskachoska@yahoo.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Mailman-Approved-At: Tue, 25 Aug 2026 22:49:58 +0000 X-BeenThere: u-boot@lists.u-boot-project.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.u-boot-project.org Add the device trees for the EN7512 and EN7528 reference boards and the EN7528 RAM-boot variant. Signed-off-by: AK Sharma --- arch/mips/dts/Makefile | 2 + .../dts/econet,en7512-reference-u-boot.dtsi | 58 +++++++ arch/mips/dts/econet,en7512-reference.dts | 27 +++ arch/mips/dts/econet,en7512.dtsi | 88 ++++++++++ arch/mips/dts/econet,en7528-ram-u-boot.dtsi | 6 + arch/mips/dts/econet,en7528-ram.dts | 72 ++++++++ .../dts/econet,en7528-reference-u-boot.dtsi | 62 +++++++ arch/mips/dts/econet,en7528-reference.dts | 25 +++ arch/mips/dts/econet,en7528.dtsi | 164 ++++++++++++++++++ 9 files changed, 504 insertions(+) create mode 100644 arch/mips/dts/econet,en7512-reference-u-boot.dtsi create mode 100644 arch/mips/dts/econet,en7512-reference.dts create mode 100644 arch/mips/dts/econet,en7512.dtsi create mode 100644 arch/mips/dts/econet,en7528-ram-u-boot.dtsi create mode 100644 arch/mips/dts/econet,en7528-ram.dts create mode 100644 arch/mips/dts/econet,en7528-reference-u-boot.dtsi create mode 100644 arch/mips/dts/econet,en7528-reference.dts create mode 100644 arch/mips/dts/econet,en7528.dtsi diff --git a/arch/mips/dts/Makefile b/arch/mips/dts/Makefile index 7c4ee8b6..3e0347dd 100644 --- a/arch/mips/dts/Makefile +++ b/arch/mips/dts/Makefile @@ -6,6 +6,8 @@ dtb-$(CONFIG_TARGET_AP152) += ap152.dtb dtb-$(CONFIG_TARGET_MALTA) += mti,malta.dtb dtb-$(CONFIG_TARGET_PIC32MZDASK) += pic32mzda_sk.dtb dtb-$(CONFIG_TARGET_XILFPGA) += nexys4ddr.dtb +dtb-$(CONFIG_ARCH_EN75XX) += econet,en7512-reference.dtb \ + econet,en7528-reference.dtb econet,en7528-ram.dtb dtb-$(CONFIG_BOARD_BROADCOM_BCM968380GERG) += brcm,bcm968380gerg.dtb dtb-$(CONFIG_BOARD_COMTREND_AR5315U) += comtrend,ar-5315u.dtb dtb-$(CONFIG_BOARD_COMTREND_AR5387UN) += comtrend,ar-5387un.dtb diff --git a/arch/mips/dts/econet,en7512-reference-u-boot.dtsi b/arch/mips/dts/econet,en7512-reference-u-boot.dtsi new file mode 100644 index 00000000..36d97c26 --- /dev/null +++ b/arch/mips/dts/econet,en7512-reference-u-boot.dtsi @@ -0,0 +1,58 @@ +// SPDX-License-Identifier: GPL-2.0+ +#include + +/ { + binman: binman { + multiple-images; + }; +}; + +&uart0 { + bootph-all; +}; + +&binman { + spl-img { + filename = "u-boot-spl.img"; + + mkimage { + args = "-A", "mips", "-T", "standalone", "-O", "u-boot", + "-C", "none", "-n", "EN7512 U-Boot SPL", + "-a", __stringify(CONFIG_SPL_TEXT_BASE), + "-e", __stringify(CONFIG_SPL_TEXT_BASE); + + u-boot-spl { + }; + }; + }; + + en7512-uboot { + filename = "u-boot-en7512.bin"; + pad-byte = <0xff>; + + u-boot-tpl { + offset = <0x00000000>; + size = <0x00008000>; + }; + + ddr-blob { + type = "blob-ext"; + filename = "arch/mips/mach-en75xx/en7512_ddr.bin"; + offset = <0x00008000>; + size = <0x00004f70>; + }; + + spl { + type = "blob"; + filename = "u-boot-spl.img"; + offset = <0x00010000>; + size = <0x00040000>; + }; + + u-boot { + type = "blob"; + filename = "u-boot.img"; + offset = <0x00050000>; + }; + }; +}; diff --git a/arch/mips/dts/econet,en7512-reference.dts b/arch/mips/dts/econet,en7512-reference.dts new file mode 100644 index 00000000..b8a3aba5 --- /dev/null +++ b/arch/mips/dts/econet,en7512-reference.dts @@ -0,0 +1,27 @@ +// SPDX-License-Identifier: GPL-2.0+ +/dts-v1/; + +#include "econet,en7512.dtsi" + +/ { + model = "EcoNet EN7512/EN7521 reference board"; + compatible = "econet,en7512-reference", "econet,en751221", + "econet,en7512"; + + aliases { + serial0 = &uart0; + ethernet0 = &gmac0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; +}; + +&uart0 { + status = "okay"; +}; + +&sfc { + status = "okay"; +}; diff --git a/arch/mips/dts/econet,en7512.dtsi b/arch/mips/dts/econet,en7512.dtsi new file mode 100644 index 00000000..0f13159d --- /dev/null +++ b/arch/mips/dts/econet,en7512.dtsi @@ -0,0 +1,88 @@ +// SPDX-License-Identifier: GPL-2.0+ + +/ { + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + compatible = "mips,mips34Kc"; + device_type = "cpu"; + reg = <0>; + }; + }; + + memory@0 { + device_type = "memory"; + reg = <0x00000000 0x08000000>; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + syscon: syscon@1fb00000 { + compatible = "econet,en7512-syscon", "syscon"; + reg = <0x1fb00000 0x1000>; + }; + + sfc: spi@1fa10000 { + compatible = "airoha,en7523-spi"; + reg = <0x1fa10000 0x140>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + spi_nand: nand@0 { + compatible = "spi-nand"; + reg = <0>; + spi-max-frequency = <20000000>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <2>; + }; + }; + + sram@1fa30000 { + compatible = "mmio-sram"; + reg = <0x1fa30000 0xc000>; + }; + + dramc: memory-controller@1fb20000 { + compatible = "econet,en7512-dramc"; + reg = <0x1fb20000 0x1000>; + }; + + ethernet: ethernet@1fb50000 { + compatible = "econet,en751221-eth"; + reg = <0x1fb50000 0x4000>, + <0x1fb54000 0x1000>; + reg-names = "fe", "qdma0"; + #address-cells = <1>; + #size-cells = <0>; + + gmac0: mac@0 { + compatible = "econet,eth-mac"; + reg = <0>; + phy-mode = "trgmii"; + }; + }; + + switch0: switch@1fb58000 { + compatible = "mediatek,mt7530"; + reg = <0x1fb58000 0x8000>; + }; + + uart0: serial@1fbf0000 { + compatible = "econet,en7512-uart"; + reg = <0x1fbf0000 0x30>; + clock-frequency = <20000000>; + current-speed = <115200>; + status = "disabled"; + }; + }; +}; diff --git a/arch/mips/dts/econet,en7528-ram-u-boot.dtsi b/arch/mips/dts/econet,en7528-ram-u-boot.dtsi new file mode 100644 index 00000000..94512540 --- /dev/null +++ b/arch/mips/dts/econet,en7528-ram-u-boot.dtsi @@ -0,0 +1,6 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* RAM-boot: no binman image; just make the console available pre-relocation. */ + +&uart0 { + bootph-all; +}; diff --git a/arch/mips/dts/econet,en7528-ram.dts b/arch/mips/dts/econet,en7528-ram.dts new file mode 100644 index 00000000..0c5a59fb --- /dev/null +++ b/arch/mips/dts/econet,en7528-ram.dts @@ -0,0 +1,72 @@ +// SPDX-License-Identifier: GPL-2.0+ +/dts-v1/; + +#include "econet,en7528.dtsi" + +/ { + model = "EcoNet EN7528 RAM-boot (bootbase-loaded)"; + compatible = "econet,en7528-ram", "econet,en7528"; + + aliases { + serial0 = &uart0; + ethernet0 = &gmac0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; +}; + +&uart0 { + status = "okay"; +}; + +&sfc { + status = "okay"; +}; + +ðernet { + status = "okay"; +}; + +&switch0 { + status = "okay"; +}; + +&usb { + status = "okay"; +}; + +/* R3-hook map (harmless on RAM-boot: extra labels on spi-nand0). */ +&spi_nand { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "bootloader"; + reg = <0x0 0x40000>; + }; + partition@40000 { + label = "uboot"; + reg = <0x40000 0x80000>; + }; + partition@c0000 { + label = "ubootenv"; + reg = <0xc0000 0x20000>; + }; + partition@e0000 { + label = "ubootenv2"; + reg = <0xe0000 0x20000>; + }; + partition@100000 { + label = "kernel"; + reg = <0x100000 0x1000000>; + }; + partition@1100000 { + label = "rootfs"; + reg = <0x1100000 0xda80000>; + }; + }; +}; diff --git a/arch/mips/dts/econet,en7528-reference-u-boot.dtsi b/arch/mips/dts/econet,en7528-reference-u-boot.dtsi new file mode 100644 index 00000000..f0ded2b0 --- /dev/null +++ b/arch/mips/dts/econet,en7528-reference-u-boot.dtsi @@ -0,0 +1,62 @@ +// SPDX-License-Identifier: GPL-2.0+ +#include + +/ { + binman: binman { + multiple-images; + }; +}; + +&uart0 { + bootph-all; +}; + +&binman { + spl-img { + filename = "u-boot-spl.img"; + + mkimage { + args = "-A", "mips", "-T", "standalone", "-O", "u-boot", + "-C", "none", "-n", "EN7528 U-Boot SPL", + "-a", __stringify(CONFIG_SPL_TEXT_BASE), + "-e", __stringify(CONFIG_SPL_TEXT_BASE); + + u-boot-spl { + }; + }; + }; + + en7528-uboot { + filename = "u-boot-en7528.bin"; + pad-byte = <0xff>; + + u-boot-tpl { + offset = <0x00000000>; + size = <0x00008000>; + }; + + /* + * en7528_ddr.bin is the 0x5a70-byte FE-SRAM DDR3 stage (JCOW407 V1.6) lifted + * from the stock bootbase (see doc/board/econet/en7528-porting.md). + */ + ddr-blob { + type = "blob-ext"; + filename = "arch/mips/mach-en75xx/en7528_ddr.bin"; + offset = <0x00008000>; + size = <0x00005a70>; + }; + + spl { + type = "blob"; + filename = "u-boot-spl.img"; + offset = <0x00020000>; + size = <0x00030000>; + }; + + u-boot { + type = "blob"; + filename = "u-boot.img"; + offset = <0x00050000>; + }; + }; +}; diff --git a/arch/mips/dts/econet,en7528-reference.dts b/arch/mips/dts/econet,en7528-reference.dts new file mode 100644 index 00000000..d029f41c --- /dev/null +++ b/arch/mips/dts/econet,en7528-reference.dts @@ -0,0 +1,25 @@ +// SPDX-License-Identifier: GPL-2.0+ +/dts-v1/; + +#include "econet,en7528.dtsi" + +/ { + model = "EcoNet EN7528 reference board (DASAN H660GM-A)"; + compatible = "econet,en7528-reference", "econet,en7528"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; +}; + +&uart0 { + status = "okay"; +}; + +&sfc { + status = "okay"; +}; diff --git a/arch/mips/dts/econet,en7528.dtsi b/arch/mips/dts/econet,en7528.dtsi new file mode 100644 index 00000000..b8b4668b --- /dev/null +++ b/arch/mips/dts/econet,en7528.dtsi @@ -0,0 +1,164 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* EcoNet/Airoha EN7528 (MIPS 1004Kc, little-endian) */ + +/ { + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + compatible = "mips,mips1004Kc"; + device_type = "cpu"; + reg = <0>; + }; + + cpu@1 { + compatible = "mips,mips1004Kc"; + device_type = "cpu"; + reg = <1>; + }; + }; + + memory@0 { + device_type = "memory"; + /* Capped below the 0x1fxxxxxx MMIO island; DDR stage + * publishes the true size at runtime (dram_init). */ + reg = <0x00000000 0x10000000>; + }; + + /* Dummy clock/phy so xhci-mtk's mandatory clk_get_bulk()/ + * generic_phy_get_bulk() succeed without an en7528 SCU clock or + * T-PHY driver; the real USB clock is left ungated by the bootbase + * and the xHCI IPPC block does the port power-up. */ + usb_clk: usb-clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24000000>; + }; + + usb_phy: usb-phy { + compatible = "nop-phy"; + #phy-cells = <0>; + clocks = <&usb_clk>; /* nop_phy_probe() calls clk_get_bulk() */ + }; + + soc { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + syscon: syscon@1fb00000 { + compatible = "econet,en7528-syscon", "syscon"; + reg = <0x1fb00000 0x1000>; + }; + + sfc: spi@1fa10000 { + compatible = "airoha,en7581-snand"; + reg = <0x1fa10000 0x140>, + <0x1fa11000 0x1000>; /* NFI: driver uses up to 0x55c; + * U-Boot regmap range-checks (Linux + * gets a full page from ioremap). */ + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + spi_nand: nand@0 { + compatible = "spi-nand"; + reg = <0>; + spi-max-frequency = <20000000>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <2>; + + /* Vendor bad-block remapping. bbt-table-size is a + * per-board constant: EN7528 uses 250, not the 1000 + * default, and a wrong value fails the BBT checksum. + * assert-reserve-size must match the pool size the + * bootbase prints ("bmt pool size: 163"). + */ + econet,bmt; + econet,bbt-table-size = <250>; + econet,assert-reserve-size = <163>; + }; + }; + + sram@1fa30000 { + compatible = "mmio-sram"; + reg = <0x1fa30000 0x20000>; + }; + + dramc: memory-controller@1fb20000 { + compatible = "econet,en7528-dramc"; + reg = <0x1fb20000 0x1000>; + }; + + /* + * EN7528 Ethernet = same EN751221-family FE/QDMA as the EN7512, + * feeding an MT7530-family DSA switch (GMAC0 -> switch CPU port). + * The airoha_eth U-Boot driver binds "econet,en751221-eth" and + * self-initializes the "mediatek,mt7530" switch. + */ + ethernet: ethernet@1fb50000 { + compatible = "econet,en751221-eth"; + reg = <0x1fb50000 0x4000>, + <0x1fb54000 0x1000>; + reg-names = "fe", "qdma0"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + gmac0: mac@0 { + compatible = "econet,eth-mac"; + reg = <0>; + phy-mode = "trgmii"; + }; + }; + + switch0: switch@1fb58000 { + compatible = "mediatek,mt7530"; + reg = <0x1fb58000 0x8000>; + status = "disabled"; + }; + + /* + * USB3 host = MediaTek xHCI (same IP as mt8173), driven by + * U-Boot's xhci-mtk. "mac" is the xHCI MMIO, "ippc" the IP port + * control block (a sub-region of the USB T-PHY window). The + * en7528 USB clock is ungated by the bootbase (the kernel node + * carries no clocks either) so &usb_clk is a dummy fixed-clock + * to satisfy clk_get_bulk(); &usb_phy is a nop-phy (the xHCI + * IPPC block powers the ports up itself). USB reset/PHY-reset are + * released by a direct SCU poke in board_late_init (there is no + * DM reset provider in this port — see board.c). + */ + usb: usb@1fb90000 { + compatible = "mediatek,mtk-xhci"; + reg = <0x1fb90000 0x4000>, + <0x1fa80700 0x100>; + reg-names = "mac", "ippc"; + clocks = <&usb_clk>; + phys = <&usb_phy>; + /* + * USB2-only: the U3/SerDes path needs SCU/serdes config + * we don't do, and leaving U3 enabled makes xhci-mtk stall + * on an unstable U3 clock (per the Airoha AN7581 USB PHY + * commit). Disable both U3 ports so only USB2 is brought up. + */ + mediatek,u3p-dis-msk = <0x3>; + status = "disabled"; + }; + + uart0: serial@1fbf0000 { + compatible = "econet,en7528-uart"; + reg = <0x1fbf0000 0x30>; + reg-io-width = <4>; + reg-shift = <2>; + clock-frequency = <2000000>; + current-speed = <115200>; + status = "disabled"; + }; + }; +}; -- 2.53.0