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[189.203.100.56]) by smtp.gmail.com with ESMTPSA id 5614622812f47-4b36ab73bfdsm213514b6e.16.2026.08.25.16.02.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 Aug 2026 16:03:00 -0700 (PDT) Date: Tue, 25 Aug 2026 17:02:57 -0600 From: Tom Rini To: AK Sharma Cc: u-boot@lists.u-boot-project.org, Christian Marangi , Daniel Schwierzeck , Dario Binacchi , Frieder Schrempf , Jerome Forissier , Marek Vasut , Michael Trimarchi Subject: Re: [PATCH v1 00/12] mips: add EcoNet/Airoha EN75xx (EN7512/EN7528) SoC support Message-ID: <20260825230257.GI523975@bill-the-cat> References: <20260825224330.713151-1-maskachoska.ref@yahoo.com> <20260825224330.713151-1-maskachoska@yahoo.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="XH2hLZ7wS+fHPcCD" Content-Disposition: inline In-Reply-To: <20260825224330.713151-1-maskachoska@yahoo.com> X-Clacks-Overhead: GNU Terry Pratchett X-BeenThere: u-boot@lists.u-boot-project.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.u-boot-project.org --XH2hLZ7wS+fHPcCD Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Wed, Aug 26, 2026 at 04:11:55AM +0530, AK Sharma wrote: > This series adds U-Boot support for the EcoNet/Airoha EN75xx MIPS SoC > family: the big-endian MIPS34Kc EN7512/EN7521 and the little-endian > MIPS1004Kc EN7528, used in many GPON/XPON ONT home gateways. It extends > the existing Airoha SNFI SPI-NAND and GDM Ethernet drivers. >=20 > It brings up the SoC (TPL/SPL, cache/CM init), and adds the UART, the > EN75 BMT SPI-NAND bad-block mapping, weak bootm decompression hooks for > the coherent CM, and Ethernet. Reference boards for the EN7512 and EN7528 > are included, plus the EN7528 R3-hook boot variant. >=20 > The DDR calibration stage is a vendor artifact and is not shipped > in-tree. The reference board packages it as a binman "blob-ext"; build > those configs with BINMAN_ALLOW_MISSING=3D1 and supply the blob to run > (see arch/mips/mach-en75xx/README.ddr-blob). A native DDR-init > implementation is a known TODO. >=20 > Tested on a Nokia G-2425G-A (EN7528, MT29F2G01 SPI-NAND): boots to the > prompt with correct 256 MiB DRAM, working Ethernet/TFTP and SPI-NAND. I am glad to see this effort. I am, after reviewing a few of the patches, worried that this is still too much of a vendor port rather than re-working the vendor port to match upstream best practices. Perhaps one thing that would help is to keep in mind what the minimum set of additions required are, to get a good amount of functionality. And then follow-up patches once the core is in. Thanks. --=20 Tom --XH2hLZ7wS+fHPcCD Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQTzzqh0PWDgGS+bTHor4qD1Cr/kCgUCao4fIQAKCRAr4qD1Cr/k CjjMAQDETqw63xt1P3KuN6NuLYeEw039XZKLkKzQs8Do2VC3AQD+JcsZOM8+hvp7 sJJJ1FDr+Ekkao2LqslOIgxC/xsx4As= =M7iz -----END PGP SIGNATURE----- --XH2hLZ7wS+fHPcCD--