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([180.150.112.50]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-39670599275sm2210473a91.0.2026.08.26.22.10.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 26 Aug 2026 22:10:25 -0700 (PDT) From: Joel Stanley To: Alistair Francis , Daniel Henrique Barboza , =?UTF-8?q?Alex=20Benn=C3=A9e?= , Paolo Bonzini Cc: Peter Maydell , Weiwei Li , Liu Zhiwei , Chao Liu , Nicholas Piggin , Anirudh Srinivasan , Michael Ellerman , Portia Stephens , qemu-riscv@nongnu.org, qemu-devel@nongnu.org, qemu-arm@nongnu.org Subject: [PATCH 02/12] tests/tcg/riscv64: Clean up semicall.h inline asm Date: Thu, 27 Aug 2026 14:39:41 +0930 Message-ID: <20260827050953.67184-3-joel@jms.id.au> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260827050953.67184-1-joel@jms.id.au> References: <20260827050953.67184-1-joel@jms.id.au> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::102e; envelope-from=joel.stan@gmail.com; helo=mail-pj1-x102e.google.com X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.001, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-riscv@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-riscv-bounces+qemu-riscv=archiver.kernel.org@nongnu.org Sender: qemu-riscv-bounces+qemu-riscv=archiver.kernel.org@nongnu.org Make __semi_call static inline so semicall.h can be included more than once in a program. Use .option push/pop rather than leaving norvc set for the rest of the file. Set the constraints for the asm block. Signed-off-by: Joel Stanley --- tests/tcg/riscv64/semicall.h | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/tests/tcg/riscv64/semicall.h b/tests/tcg/riscv64/semicall.h index 2fdd322af91f..34e87332de44 100644 --- a/tests/tcg/riscv64/semicall.h +++ b/tests/tcg/riscv64/semicall.h @@ -8,16 +8,19 @@ */ #include -uintptr_t __semi_call(uintptr_t type, uintptr_t arg0) +static inline uintptr_t __semi_call(uintptr_t type, uintptr_t arg0) { register uintptr_t t asm("a0") = type; register uintptr_t a0 asm("a1") = arg0; - asm(".option norvc\n\t" + asm(".option push\n\t" + ".option norvc\n\t" ".balign 16\n\t" "slli zero, zero, 0x1f\n\t" "ebreak\n\t" "srai zero, zero, 0x7\n\t" - : "=r" (t) - : "r" (t), "r" (a0)); + ".option pop\n\t" + : "+r" (t) /* Output: read as input, written as return value */ + : "r" (a0) /* Input: arg0 */ + : "memory"); /* Clobber: may modify memory, depending on type */ return t; } -- 2.47.3