Re: [PATCH] PCI: endpoint: Fix BAR backing DMA address alignment

[sashiko-bot@kernel.org]

> DWC BAR Match Mode requires the target address to be aligned to the BAR
> size. pci_epf_alloc_space() relies on dma_alloc_coherent() to provide
> that alignment. For CMA-backed allocations, the guaranteed physical
> alignment is capped at PAGE_SIZE << CONFIG_CMA_ALIGNMENT. With a direct
> DMA mapping, 4 KiB pages, and CONFIG_CMA_ALIGNMENT=8, a 2 MiB BAR may
> therefore receive a DMA address aligned to only 1 MiB.
> dw_pcie_prog_ep_inbound_atu() rejects such a mapping with -EINVAL.
> 
> If the initial allocation is misaligned, free it and retry with
> mem_size - 1 bytes of padding. Select an aligned subrange and record its
> offset so pci_epf_free_space() can pass the original CPU address, DMA
> handle, and size to dma_free_coherent().
> 
> Fixes: 5e8cb4033807 ("PCI: endpoint: Add EP core layer to enable EP controller and EP functions")
> Signed-off-by: Koichiro Den <den@valinux.co.jp>

Sashiko has reviewed this patch and found no issues. It looks great!

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Sashiko AI review · https://sashiko.dev/#/patchset/20260827181757.1984374-1-den@valinux.co.jp?part=1