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pr=C From: Michal Orzel To: CC: Andrew Cooper , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , "Volodymyr Babchuk" Subject: [PATCH v2] ARM/vgic: Clean up vgic_v{2,3}_setup_hw() Date: Fri, 28 Aug 2026 09:04:09 +0200 Message-ID: <20260828070409.106935-1-michal.orzel@amd.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MWH0EPF000C618B:EE_|SA1PR12MB5672:EE_ X-MS-Office365-Filtering-Correlation-Id: c4ba58b3-8ec3-4724-879f-08df04d292f4 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|36860700016|376014|1800799024|23010399003|56012099006|10067099003|11063799006|18002099003; X-Microsoft-Antispam-Message-Info: GOtF4EQie1H6NYsOCgKuLhCQOccxOXUqPM4j7oL7V483apNYdNPgMONZjghGMzLWHPmIJedVKGPR0mAVCKeaVV0jX+I0ZrjMiN+vEDu3r2qymPFHDNg+XVh0kXRMfKm+UFixsKxpb42+LjSq0op8sIyoK/Cd9uPm3jovUgXNVjBHQ5HjnOtZWWdJsRW3wyc1iZOzaw2zocekmCU3PEh9D9KbQusAOxRHmsBEsezlRvvvqeEYwVuKQe4YBw0qTsFEEcvKdgn56nseGGPvzWAOM1PE5PzNayU/3UZrczh7eR4Y5ltiFPLHEWFRXkaXecqgic5xaec3ORktX2Qg+C4hiTNDy7RIEOeryJZWSTWsXff6FktuTWCQCimLWbwkMDnKUPMi3FVxdvh8qoDplBNHgpMzNgoVtl8/jJW39jh9aeVeXbjoFjsDMHfIf3KdObPAOSyvmiR5NbcRYDm87CZpbyxVTwHybKHdprY81rMTpTKLRUzhg1axDk6Vpx04vK3EB0MThgkdpYmfMQU7ltsOrHlUIWuf+FSGJ5C04nF1T2jvoqmR0i/vZVrXagrgC3UPo622dZpwTvxcWGr9u8LSwzK6XKxWiauRemT0fkaHHw5GmaijY3gx9PWbkJQRucl66IT7MKoeLklFaQAAkMgX++pI1Q5P/mDhrxoC+CBQGO5OFWVZfJc82jQXn00pWi2sL+GXJ/WbRHQyGJpyZfAY/A== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb08.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(82310400026)(36860700016)(376014)(1800799024)(23010399003)(56012099006)(10067099003)(11063799006)(18002099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: eYgwgacmIKLNHs9NFPS/U9V+Qie2+olemviKv9TfeerUsqe0eU8olEqhjpHFb8mFhWpqDTy4qLIRobNRBhi3Oj1UuW4Pi/Htv1gw4qSWTA3kOJsyy9B5F97z2v0WZTKauzpO5J9EgBIvXoAZIKiv9PR9O4bEOutVjDr2Rfzxoa/vnZpHV2tDqFEp5ZSZTEiR7a//JFzUg/IYce33c3LaiD8URWbxVF4kU2b4azuwha0yTSdDKiMw89rzXkizWNPaPyAxQTNWKPjy02ouOhY8leE7WlLk0M3LglNhuaOkj29S5zQSTpQXM/UwN0NorA/abk6oj1VyBXJfr2UMQTa64w2Shr/ne1mUk5lz8hc8sCuNqnRGjRkAwQidU21reM7ak/N+zlwHzfHhiDYlMpcBnc74WnCd2IMvIKLqwdTSXyiF1K5f7MWdFlek3BgKfTUJ X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Aug 2026 07:04:16.3613 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c4ba58b3-8ec3-4724-879f-08df04d292f4 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000C618B.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB5672 X-purgate-ID: tlsNG-d25034/1787900664-77ED2A5B-9AB31B0E/0/0 X-purgate-type: clean X-purgate-size: 4662 From: Andrew Cooper vgic_v{2,3}_setup_hw()'s callers are __init, so they should be too. vgic_v{2,3}_hw and gic_v2_hw_data are written once during init and unmodified thereafter, so make them __ro_after_init. Reposition 'bool enabled' in these structures to fit in the tail padding, removing 8 bytes from their size when paddr_t is 8B. While at it, drop dead vgic_v3_setup_hw() dummy implementation from vgic/vgic.c. GICV3 depends on !NEW_VGIC. No functional change. Signed-off-by: Andrew Cooper Signed-off-by: Michal Orzel --- Changes in v2 (Michal): - take Andrew's v1 patch and extend the changes to vGICv3 and new vGICv2 --- xen/arch/arm/vgic-v2.c | 8 ++++---- xen/arch/arm/vgic-v3.c | 11 +++++------ xen/arch/arm/vgic/vgic-v2.c | 8 ++++---- xen/arch/arm/vgic/vgic.c | 11 ----------- 4 files changed, 13 insertions(+), 25 deletions(-) diff --git a/xen/arch/arm/vgic-v2.c b/xen/arch/arm/vgic-v2.c index 642407fd5b05..3fa8cdeeab14 100644 --- a/xen/arch/arm/vgic-v2.c +++ b/xen/arch/arm/vgic-v2.c @@ -25,7 +25,6 @@ #include static struct { - bool enabled; /* Distributor interface address */ paddr_t dbase; /* CPU interface address & size */ @@ -36,10 +35,11 @@ static struct { /* Offset to add to get an 8kB contiguous region if GIC is aliased */ uint32_t aliased_offset; -} vgic_v2_hw; + bool enabled; +} vgic_v2_hw __ro_after_init; -void vgic_v2_setup_hw(paddr_t dbase, paddr_t cbase, paddr_t csize, - paddr_t vbase, uint32_t aliased_offset) +void __init vgic_v2_setup_hw(paddr_t dbase, paddr_t cbase, paddr_t csize, + paddr_t vbase, uint32_t aliased_offset) { vgic_v2_hw.enabled = true; vgic_v2_hw.dbase = dbase; diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c index c01cc596d593..16e9d0cbad03 100644 --- a/xen/arch/arm/vgic-v3.c +++ b/xen/arch/arm/vgic-v3.c @@ -44,19 +44,18 @@ #define VGICD_CTLR_DEFAULT (GICD_CTLR_ARE_NS) static struct { - bool enabled; /* Distributor interface address */ paddr_t dbase; /* Re-distributor regions */ unsigned int nr_rdist_regions; const struct rdist_region *regions; unsigned int intid_bits; /* Number of interrupt ID bits */ -} vgic_v3_hw; + bool enabled; +} vgic_v3_hw __ro_after_init; -void vgic_v3_setup_hw(paddr_t dbase, - unsigned int nr_rdist_regions, - const struct rdist_region *regions, - unsigned int intid_bits) +void __init vgic_v3_setup_hw(paddr_t dbase, unsigned int nr_rdist_regions, + const struct rdist_region *regions, + unsigned int intid_bits) { vgic_v3_hw.enabled = true; vgic_v3_hw.dbase = dbase; diff --git a/xen/arch/arm/vgic/vgic-v2.c b/xen/arch/arm/vgic/vgic-v2.c index 6a558089c522..06fa36545355 100644 --- a/xen/arch/arm/vgic/vgic-v2.c +++ b/xen/arch/arm/vgic/vgic-v2.c @@ -24,7 +24,6 @@ #include "vgic.h" static struct { - bool enabled; paddr_t dbase; /* Distributor interface address */ paddr_t cbase; /* CPU interface address & size */ paddr_t csize; @@ -32,10 +31,11 @@ static struct { /* Offset to add to get an 8kB contiguous region if GIC is aliased */ uint32_t aliased_offset; -} gic_v2_hw_data; + bool enabled; +} gic_v2_hw_data __ro_after_init; -void vgic_v2_setup_hw(paddr_t dbase, paddr_t cbase, paddr_t csize, - paddr_t vbase, uint32_t aliased_offset) +void __init vgic_v2_setup_hw(paddr_t dbase, paddr_t cbase, paddr_t csize, + paddr_t vbase, uint32_t aliased_offset) { gic_v2_hw_data.enabled = true; gic_v2_hw_data.dbase = dbase; diff --git a/xen/arch/arm/vgic/vgic.c b/xen/arch/arm/vgic/vgic.c index b2c0e1873ace..ba029b8a3bbf 100644 --- a/xen/arch/arm/vgic/vgic.c +++ b/xen/arch/arm/vgic/vgic.c @@ -964,17 +964,6 @@ unsigned int vgic_max_vcpus(unsigned int domctl_vgic_version) } } -#ifdef CONFIG_GICV3 -/* Dummy implementation to allow building without actual vGICv3 support. */ -void vgic_v3_setup_hw(paddr_t dbase, - unsigned int nr_rdist_regions, - const struct rdist_region *regions, - unsigned int intid_bits) -{ - panic("New VGIC implementation does not yet support GICv3\n"); -} -#endif - /* * Local variables: * mode: C -- 2.43.0