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Fri, 28 Aug 2026 09:53:49 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=satlexmb07.amd.com; pr=C Received: from satlexmb07.amd.com (165.204.84.17) by DS1PEPF00017097.mail.protection.outlook.com (10.167.18.101) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.382.8 via Frontend Transport; Fri, 28 Aug 2026 09:53:49 +0000 Received: from ubuntu.amd.com (10.180.168.240) by satlexmb07.amd.com (10.181.42.216) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.45; Fri, 28 Aug 2026 04:53:47 -0500 From: Zhu Lingshan To: , , CC: , , Zhu Lingshan Subject: [PATCH 05/10] drm/amdgpu: implement asynchronous userq destruction routine Date: Fri, 28 Aug 2026 17:53:44 +0800 Message-ID: <20260828095349.9797-6-lingshan.zhu@amd.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260828095349.9797-1-lingshan.zhu@amd.com> References: <20260828095349.9797-1-lingshan.zhu@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: satlexmb08.amd.com (10.181.42.217) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS1PEPF00017097:EE_|BY5PR12MB4132:EE_ X-MS-Office365-Filtering-Correlation-Id: 84950661-0ccf-4acd-d4e0-08df04ea42ae X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Ip=[165.204.84.17]; Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DS1PEPF00017097.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR12MB4132 X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" The last kref of a user queue may be released from a context where can not sleep or require an alrady hold lock(reset_domain->sem, reset_mutext, etc) in the same context. This commit helps resovle these issues by refactoring the user queue destruction function to a deferred work item, so it does not conflict with the caller context. Signed-off-by: Zhu Lingshan --- drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c | 15 ++++++++++++--- drivers/gpu/drm/amd/amdgpu/amdgpu_userq.h | 7 +++++++ 2 files changed, 19 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c index f398986a61a5..9fe20cb9af58 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c @@ -596,11 +596,11 @@ amdgpu_userq_destroy(struct amdgpu_userq_mgr *uq_mgr, struct amdgpu_usermode_que return r; } -static void amdgpu_userq_kref_destroy(struct kref *kref) +static void amdgpu_userq_destroy_worker(struct work_struct *work) { int r; struct amdgpu_usermode_queue *queue = - container_of(kref, struct amdgpu_usermode_queue, refcount); + container_of(work, struct amdgpu_usermode_queue, destroy_work); struct amdgpu_userq_mgr *uq_mgr = queue->userq_mgr; r = amdgpu_userq_destroy(uq_mgr, queue); @@ -610,6 +610,14 @@ static void amdgpu_userq_kref_destroy(struct kref *kref) amdgpu_userq_mgr_dec_refs(uq_mgr); } +static void amdgpu_userq_kref_release(struct kref *kref) +{ + struct amdgpu_usermode_queue *queue = + container_of(kref, struct amdgpu_usermode_queue, refcount); + + WARN_ON_ONCE(!queue_work(system_unbound_wq, &queue->destroy_work)); +} + struct amdgpu_usermode_queue *amdgpu_userq_get(struct amdgpu_userq_mgr *uq_mgr, u32 qid) { struct amdgpu_usermode_queue *queue; @@ -656,7 +664,7 @@ amdgpu_lookup_queue_by_doorbell(struct xarray *xa, u32 doorbell) void amdgpu_userq_put(struct amdgpu_usermode_queue *queue) { if (queue) - kref_put(&queue->refcount, amdgpu_userq_kref_destroy); + kref_put(&queue->refcount, amdgpu_userq_kref_release); } static int amdgpu_userq_priority_permit(struct drm_file *filp, @@ -724,6 +732,7 @@ amdgpu_userq_create(struct drm_file *filp, union drm_amdgpu_userq *args) amdgpu_userq_mgr_inc_refs(uq_mgr); INIT_DELAYED_WORK(&queue->hang_detect_work, amdgpu_userq_hang_detect_work); + INIT_WORK(&queue->destroy_work, amdgpu_userq_destroy_worker); r = amdgpu_userq_fence_driver_alloc(adev, &queue->fence_drv); if (r) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.h index a13d8d4dd5c7..ecc450be7eb2 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.h @@ -87,6 +87,13 @@ struct amdgpu_usermode_queue { * Delayed work which runs when userq_fences time out. */ struct delayed_work hang_detect_work; + + /** + * @destroy_work: + * + * Work struct used to destroy the queue when kref == 0 + */ + struct work_struct destroy_work; struct kref refcount; union { -- 2.53.0