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Mon, 31 Aug 2026 05:37:00 +0000 From: Kane Chen To: =?iso-8859-1?Q?C=E9dric_Le_Goater?= , Peter Maydell , Steven Lee , Troy Lee , Jamin Lin , Andrew Jeffery , Joel Stanley , "open list:ASPEED BMCs" , "open list:All patches CC here" CC: Troy Lee , Kane Chen Subject: [PATCH v1 1/2] hw/misc/aspeed_sbc: Derive ABR state from OTP config straps Thread-Topic: [PATCH v1 1/2] hw/misc/aspeed_sbc: Derive ABR state from OTP config straps Thread-Index: AQHdOQq+cBR9EwprsUu3rVJhF83igA== Date: Mon, 31 Aug 2026 05:37:00 +0000 Message-ID: <20260831053658.462203-2-kane_chen@aspeedtech.com> References: <20260831053658.462203-1-kane_chen@aspeedtech.com> In-Reply-To: <20260831053658.462203-1-kane_chen@aspeedtech.com> Accept-Language: zh-TW, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=aspeedtech.com; x-ms-publictraffictype: Email x-ms-traffictypediagnostic: SI6PR06MB7631:EE_|KUXPR06MB8654:EE_ x-ms-office365-filtering-correlation-id: 67382dbf-b12d-42fe-690a-08df0721e11a x-ms-exchange-senderadcheck: 1 x-ms-exchange-antispam-relay: 0 x-microsoft-antispam: BCL:0; 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envelope-from=kane_chen@aspeedtech.com; helo=TYPPR03CU001.outbound.protection.outlook.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org Sender: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org The eMMC ABR (Alternate Boot Recovery) enable state was controlled by=0A= a fixed "emmc-abr" machine property, and the logic reflecting it in=0A= R_STATUS was broken so ABR could never actually be reported as=0A= enabled.=0A= =0A= Instead of relying on the property, read the ABR strap value directly=0A= from the OTP configuration space and derive the enable state from it,=0A= matching how the real hardware determines ABR. The now-unused=0A= "emmc-abr" property is removed.=0A= =0A= Signed-off-by: Kane-Chen-AS =0A= ---=0A= include/hw/misc/aspeed_sbc.h | 1 -=0A= hw/misc/aspeed_sbc.c | 35 ++++++++++++++++++++++++++++++++---=0A= 2 files changed, 32 insertions(+), 4 deletions(-)=0A= =0A= diff --git a/include/hw/misc/aspeed_sbc.h b/include/hw/misc/aspeed_sbc.h=0A= index 07c7c22a86..7152497b2a 100644=0A= --- a/include/hw/misc/aspeed_sbc.h=0A= +++ b/include/hw/misc/aspeed_sbc.h=0A= @@ -32,7 +32,6 @@ OBJECT_DECLARE_TYPE(AspeedSBCState, AspeedSBCClass, ASPEE= D_SBC)=0A= struct AspeedSBCState {=0A= SysBusDevice parent;=0A= =0A= - bool emmc_abr;=0A= uint32_t signing_settings;=0A= =0A= MemoryRegion iomem;=0A= diff --git a/hw/misc/aspeed_sbc.c b/hw/misc/aspeed_sbc.c=0A= index 1dfcf14e5b..5d4da39d30 100644=0A= --- a/hw/misc/aspeed_sbc.c=0A= +++ b/hw/misc/aspeed_sbc.c=0A= @@ -60,6 +60,9 @@=0A= #define MODE_REGISTER_A (0x3000)=0A= #define MODE_REGISTER_B (0x5000)=0A= =0A= +/* OTP Address */=0A= +#define OTP_CFG0 (0x800)=0A= +=0A= static uint64_t aspeed_sbc_read(void *opaque, hwaddr addr, unsigned int si= ze)=0A= {=0A= AspeedSBCState *s =3D ASPEED_SBC(opaque);=0A= @@ -261,17 +264,44 @@ static const MemoryRegionOps aspeed_sbc_ops =3D {=0A= },=0A= };=0A= =0A= +static bool aspeed_get_abr_state(AspeedSBCState *s)=0A= +{=0A= + uint32_t value;=0A= + int i;=0A= + bool enable =3D false;=0A= + int config_offset;=0A= +=0A= + /*=0A= + * ABR is a strap setting, and each strap setting consists of six=0A= + * sub-values. Read all sub-values to retrieve the latest setting.=0A= + */=0A= + for (i =3D 17; i < 28; i +=3D 2) {=0A= + config_offset =3D OTP_CFG0;=0A= + config_offset |=3D (i / 8) * 0x200;=0A= + config_offset |=3D (i % 8) * 0x2;=0A= +=0A= + aspeed_sbc_otp_read(s, config_offset);=0A= + value =3D s->regs[R_CAMP1];=0A= + enable ^=3D (value >> 11) & 0x1;=0A= + }=0A= +=0A= + return enable;=0A= +}=0A= +=0A= static void aspeed_sbc_reset_hold(Object *obj, ResetType type)=0A= {=0A= AspeedSBCState *s =3D ASPEED_SBC(obj);=0A= + bool abr;=0A= =0A= memset(s->regs, 0, sizeof(s->regs));=0A= =0A= + abr =3D aspeed_get_abr_state(s);=0A= +=0A= /* Set secure boot enabled with RSA4096_SHA256 and enable eMMC ABR */= =0A= s->regs[R_STATUS] =3D OTP_IDLE | OTP_MEM_IDLE;=0A= =0A= - if (s->emmc_abr) {=0A= - s->regs[R_STATUS] &=3D ABR_EN;=0A= + if (abr) {=0A= + s->regs[R_STATUS] |=3D ABR_EN;=0A= }=0A= =0A= if (s->signing_settings) {=0A= @@ -323,7 +353,6 @@ static const VMStateDescription vmstate_aspeed_sbc =3D = {=0A= };=0A= =0A= static const Property aspeed_sbc_properties[] =3D {=0A= - DEFINE_PROP_BOOL("emmc-abr", AspeedSBCState, emmc_abr, 0),=0A= DEFINE_PROP_UINT32("signing-settings", AspeedSBCState, signing_setting= s, 0),=0A= };=0A= =0A= -- =0A= 2.43.0=0A=