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From: Junjie Cao <junjie.cao@intel.com>
To: Chen Pei <cp0613@linux.alibaba.com>
Cc: palmer@dabbelt.com, alistair.francis@wdc.com, mst@redhat.com,
	imammedo@redhat.com, sunilvl@ventanamicro.com,
	sunilvl@oss.qualcomm.com, jic23@kernel.org, pbonzini@redhat.com,
	liwei1518@gmail.com, daniel.barboza@oss.qualcomm.com,
	zhiwei_liu@linux.alibaba.com, chao.liu@processmission.com,
	anisinha@redhat.com, dave.jiang@intel.com,
	alison.schofield@intel.com, guoren@kernel.org,
	qemu-riscv@nongnu.org, qemu-devel@nongnu.org,
	linux-cxl@vger.kernel.org
Subject: Re: [PATCH v4 6/6] tests/qtest: Update RISC-V CXL ACPI golden master binaries
Date: Mon, 31 Aug 2026 14:38:24 +0800	[thread overview]
Message-ID: <20260831063826.409086-1-junjie.cao@intel.com> (raw)
In-Reply-To: <20260828151317.815-7-cp0613@linux.alibaba.com>

Hi Chen Pei,

On Fri, 28 Aug 2026 23:13:05 +0800, Chen Pei wrote:
>         QWordMemory (... 0x400100000 .. 0x40020FFFF ...) // 64-bit MMIO

This one fails for me on d2e570cc0f with the in-tree
pc-bios/edk2-riscv-code.fd (edk2-stable202408.01):

  not ok /riscv64/acpi/virt/cxl

Regenerated with TEST_ACPI_REBUILD_AML=y, the file differs from the
posted one only in the length of that window, 0x10000 here against
your 0x110000, plus the matching shift of PCI0's second 64-bit range.
The 64 KiB is the root port's own BAR0 -- this firmware degrades the
Type3's 64-bit BARs into the root port's 32-bit window. The extra
1 MiB in your file is one bridge prefetchable window, which fits the
edk2-stable202602 you mentioned on v2: that release carries f6489621
("PciBusDxe: Degrade MEM64 to PMEM64 when bridge lacks MEM64"),
reverted again in March (defbd14).

A golden carrying the firmware's allocation is the same situation as
the q35 CXL golden with SeaBIOS, it just has to come from the blob the
test boots. Regenerated here it is also 6331 bytes, sha1
20608434d5b8c7e06d24a59e3a366cb23d1b0238. CEDT.cxl matches.
Re-running this on v5 is no trouble.

Many thanks,
Junjie


  reply	other threads:[~2026-08-31  6:38 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-28 15:12 [PATCH v4 0/6] hw/riscv/virt: Add CXL support to the RISC-V virt machine Chen Pei
2026-08-28 15:13 ` [PATCH v4 1/6] " Chen Pei
2026-08-28 15:13 ` [PATCH v4 2/6] hw/riscv/virt-acpi-build: Add _DEP to ACPI0017 for CXL host bridge dependency Chen Pei
2026-08-28 15:13 ` [PATCH v4 3/6] hw/riscv/virt: Advertise the CXL host bridge to firmware via extra-pci-roots Chen Pei
2026-08-31  6:37   ` Junjie Cao
2026-08-31 12:30     ` Chen Pei
2026-08-28 15:13 ` [PATCH v4 4/6] tests/qtest: Prepare golden files for the RISC-V CXL ACPI test Chen Pei
2026-08-31  6:37   ` Junjie Cao
2026-08-28 15:13 ` [PATCH v4 5/6] tests/qtest: Add RISC-V ACPI bios tables test for CXL Chen Pei
2026-08-31  6:38   ` Junjie Cao
2026-08-28 15:13 ` [PATCH v4 6/6] tests/qtest: Update RISC-V CXL ACPI golden master binaries Chen Pei
2026-08-31  6:38   ` Junjie Cao [this message]
2026-08-31 12:27     ` Chen Pei

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