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envelope-from=nnmlinux@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -26 X-Spam_score: -2.7 X-Spam_bar: -- X-Spam_report: (-2.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Add spapr_phb_vfio_errinjct() to the VFIO EEH backend in spapr_pci_vfio.c. The function maps guest RTAS IOA bus-error types to the corresponding VFIO EEH ioctl error types: RTAS_ERR_TYPE_IOA_BUS_ERROR -> EEH_ERR_TYPE_32 RTAS_ERR_TYPE_IOA_BUS_ERROR_64 -> EEH_ERR_TYPE_64 EEH_ERR_TYPE_32 / EEH_ERR_TYPE_64 are imported from the powerpc UAPI EEH header where available; fallback numeric definitions are provided to guard against older build environments. The backend consumes type, func, addr, and mask from the caller. It does not accept or interpret config_addr; PHB/PE selection is the caller's responsibility via the sphb pointer. Supporting type definitions are added to include/hw/ppc/spapr.h: - EEH_ERR_FUNC_* and EEH_ERR_FUNC_MAX - EEH_ERR_TYPE_32 / EEH_ERR_TYPE_64 (with #ifndef guards) - enum rtas_err_type (RTAS ibm,errinjct error token values) - RTAS_IBM_ERRINJCT token The function prototype is added to include/hw/pci-host/spapr.h inside the CONFIG_LINUX ifdef block alongside the other EEH hooks. Signed-off-by: Narayana Murty N --- hw/ppc/spapr_pci_vfio.c | 75 +++++++++++++++++++++++++++++++++++++ include/hw/pci-host/spapr.h | 8 ++++ include/hw/ppc/spapr.h | 60 ++++++++++++++++++++++++++++- 3 files changed, 142 insertions(+), 1 deletion(-) diff --git a/hw/ppc/spapr_pci_vfio.c b/hw/ppc/spapr_pci_vfio.c index a748a0bf4c..7afca0cec6 100644 --- a/hw/ppc/spapr_pci_vfio.c +++ b/hw/ppc/spapr_pci_vfio.c @@ -26,6 +26,7 @@ #include "hw/pci/pci_device.h" #include "hw/vfio/vfio-container-legacy.h" #include "qemu/error-report.h" +#include "hw/vfio/pci.h" #include CONFIG_DEVICES /* CONFIG_VFIO_PCI */ /* @@ -317,6 +318,74 @@ int spapr_phb_vfio_eeh_configure(SpaprPhbState *sphb) return RTAS_OUT_SUCCESS; } +static int spapr_vfio_errinjct_rtas_type_to_vfio(uint32_t rtas_type) +{ + switch (rtas_type) { + case RTAS_ERR_TYPE_IOA_BUS_ERROR: + return EEH_ERR_TYPE_32; + case RTAS_ERR_TYPE_IOA_BUS_ERROR_64: + return EEH_ERR_TYPE_64; + default: + return -1; + } +} + +static bool spapr_vfio_errinjct_func_valid(uint32_t func) +{ + return func <= EEH_ERR_FUNC_MAX; +} + +int spapr_phb_vfio_errinjct(SpaprPhbState *sphb, uint32_t type, + uint32_t func, uint64_t addr, uint64_t mask) +{ + VFIOLegacyContainer *container; + struct vfio_eeh_pe_op op = { + .op = VFIO_EEH_PE_INJECT_ERR, + .argsz = sizeof(op), + }; + int vfio_type; + + if (!sphb) { + return RTAS_OUT_PARAM_ERROR; + } + + if (!spapr_vfio_errinjct_func_valid(func)) { + return RTAS_OUT_PARAM_ERROR; + } + + vfio_type = spapr_vfio_errinjct_rtas_type_to_vfio(type); + if (vfio_type < 0) { + return RTAS_OUT_NOT_SUPPORTED; + } + + container = vfio_eeh_as_container(&sphb->iommu_as); + if (!container) { + error_report("vfio/eeh errinjct: no VFIO EEH container for PHB"); + return RTAS_OUT_NOT_SUPPORTED; + } + + op.err.type = vfio_type; + op.err.func = func; + op.err.addr = addr; + op.err.mask = mask; + + if (ioctl(container->fd, VFIO_EEH_PE_OP, &op) < 0) { + error_report("vfio/eeh errinjct: VFIO_EEH_PE_OP failed: %s", + strerror(errno)); + switch (errno) { + case EINVAL: + return RTAS_OUT_PARAM_ERROR; + case ENOTTY: + case EOPNOTSUPP: + return RTAS_OUT_NOT_SUPPORTED; + default: + return RTAS_OUT_HW_ERROR; + } + } + + return RTAS_OUT_SUCCESS; +} + #else bool spapr_phb_eeh_available(SpaprPhbState *sphb) @@ -349,4 +418,10 @@ int spapr_phb_vfio_eeh_configure(SpaprPhbState *sphb) return RTAS_OUT_NOT_SUPPORTED; } +int spapr_phb_vfio_errinjct(SpaprPhbState *sphb, uint32_t type, + uint32_t func, uint64_t addr, uint64_t mask) +{ + return RTAS_OUT_NOT_SUPPORTED; +} + #endif /* CONFIG_VFIO_PCI */ diff --git a/include/hw/pci-host/spapr.h b/include/hw/pci-host/spapr.h index 0db87f1281..24109409f4 100644 --- a/include/hw/pci-host/spapr.h +++ b/include/hw/pci-host/spapr.h @@ -125,6 +125,8 @@ int spapr_phb_vfio_eeh_get_state(SpaprPhbState *sphb, int *state); int spapr_phb_vfio_eeh_reset(SpaprPhbState *sphb, int option); int spapr_phb_vfio_eeh_configure(SpaprPhbState *sphb); void spapr_phb_vfio_reset(DeviceState *qdev); +int spapr_phb_vfio_errinjct(SpaprPhbState *sphb, uint32_t type, + uint32_t func, uint64_t addr, uint64_t mask); #else static inline bool spapr_phb_eeh_available(SpaprPhbState *sphb) { @@ -151,6 +153,12 @@ static inline int spapr_phb_vfio_eeh_configure(SpaprPhbState *sphb) static inline void spapr_phb_vfio_reset(DeviceState *qdev) { } +static inline int spapr_phb_vfio_errinjct(SpaprPhbState *sphb, uint32_t type, + uint32_t func, uint64_t addr, + uint64_t mask) +{ + return RTAS_OUT_NOT_SUPPORTED; +} #endif void spapr_phb_dma_reset(SpaprPhbState *sphb); diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index 9acda15d4f..253dc0e862 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -682,6 +682,63 @@ void push_sregs_to_kvm_pr(SpaprMachineState *spapr); #define RTAS_EEH_PE_UNAVAIL_INFO 1000 #define RTAS_EEH_PE_RECOVER_INFO 0 +/* EEH error injection types and functions */ +#define EEH_ERR_FUNC_MIN 0 +#define EEH_ERR_FUNC_LD_MEM_ADDR 0 /* Memory load */ +#define EEH_ERR_FUNC_LD_MEM_DATA 1 +#define EEH_ERR_FUNC_LD_IO_ADDR 2 /* IO load */ +#define EEH_ERR_FUNC_LD_IO_DATA 3 +#define EEH_ERR_FUNC_LD_CFG_ADDR 4 /* Config load */ +#define EEH_ERR_FUNC_LD_CFG_DATA 5 +#define EEH_ERR_FUNC_ST_MEM_ADDR 6 /* Memory store */ +#define EEH_ERR_FUNC_ST_MEM_DATA 7 +#define EEH_ERR_FUNC_ST_IO_ADDR 8 /* IO store */ +#define EEH_ERR_FUNC_ST_IO_DATA 9 +#define EEH_ERR_FUNC_ST_CFG_ADDR 10 /* Config store */ +#define EEH_ERR_FUNC_ST_CFG_DATA 11 +#define EEH_ERR_FUNC_DMA_RD_ADDR 12 /* DMA read */ +#define EEH_ERR_FUNC_DMA_RD_DATA 13 +#define EEH_ERR_FUNC_DMA_RD_MASTER 14 +#define EEH_ERR_FUNC_DMA_RD_TARGET 15 +#define EEH_ERR_FUNC_DMA_WR_ADDR 16 /* DMA write */ +#define EEH_ERR_FUNC_DMA_WR_DATA 17 +#define EEH_ERR_FUNC_DMA_WR_MASTER 18 +#define EEH_ERR_FUNC_DMA_WR_TARGET 19 +#define EEH_ERR_FUNC_MAX EEH_ERR_FUNC_DMA_WR_TARGET + +/* + * RTAS ibm,errinjct error type byte values. These are RTAS ABI token + * numbers, not the same as the VFIO EEH ABI type values consumed by + * VFIO_EEH_PE_INJECT_ERR. An explicit mapping is required. + */ +/* Use powerpc EEH UAPI constants where available; define locally otherwise. */ +#ifndef EEH_ERR_TYPE_32 +#define EEH_ERR_TYPE_32 0 +#endif +#ifndef EEH_ERR_TYPE_64 +#define EEH_ERR_TYPE_64 1 +#endif + +/* RTAS PCI Error Injection Token Types */ +enum rtas_err_type { + RTAS_ERR_TYPE_FATAL = 0x1, + RTAS_ERR_TYPE_RECOVERED_RANDOM_EVENT = 0x2, + RTAS_ERR_TYPE_RECOVERED_SPECIAL_EVENT = 0x3, + RTAS_ERR_TYPE_CORRUPTED_PAGE = 0x4, + RTAS_ERR_TYPE_CORRUPTED_SLB = 0x5, + RTAS_ERR_TYPE_TRANSLATOR_FAILURE = 0x6, + RTAS_ERR_TYPE_IOA_BUS_ERROR = 0x7, + RTAS_ERR_TYPE_PLATFORM_SPECIFIC = 0x8, + RTAS_ERR_TYPE_CORRUPTED_DCACHE_START = 0x9, + RTAS_ERR_TYPE_CORRUPTED_DCACHE_END = 0xA, + RTAS_ERR_TYPE_CORRUPTED_ICACHE_START = 0xB, + RTAS_ERR_TYPE_CORRUPTED_ICACHE_END = 0xC, + RTAS_ERR_TYPE_CORRUPTED_TLB_START = 0xD, + RTAS_ERR_TYPE_CORRUPTED_TLB_END = 0xE, + RTAS_ERR_TYPE_IOA_BUS_ERROR_64 = 0xF, + RTAS_ERR_TYPE_UPSTREAM_IO_ERROR = 0x10 +}; + /* ibm,set-slot-reset */ #define RTAS_SLOT_RESET_DEACTIVATE 0 #define RTAS_SLOT_RESET_HOT 1 @@ -764,8 +821,9 @@ void push_sregs_to_kvm_pr(SpaprMachineState *spapr); #define RTAS_IBM_NMI_REGISTER (RTAS_TOKEN_BASE + 0x2B) #define RTAS_IBM_NMI_INTERLOCK (RTAS_TOKEN_BASE + 0x2C) #define RTAS_CONFIGURE_KERNEL_DUMP (RTAS_TOKEN_BASE + 0x2D) +#define RTAS_IBM_ERRINJCT (RTAS_TOKEN_BASE + 0x2E) -#define RTAS_TOKEN_MAX (RTAS_TOKEN_BASE + 0x2E) +#define RTAS_TOKEN_MAX (RTAS_TOKEN_BASE + 0x2F) /* RTAS ibm,get-system-parameter token values */ #define RTAS_SYSPARM_SPLPAR_CHARACTERISTICS 20 -- 2.54.0