From: Chen Pei <cp0613@linux.alibaba.com>
To: palmer@dabbelt.com, alistair.francis@wdc.com, mst@redhat.com,
imammedo@redhat.com, sunilvl@ventanamicro.com, jic23@kernel.org
Cc: pbonzini@redhat.com, liwei1518@gmail.com,
daniel.barboza@oss.qualcomm.com, zhiwei_liu@linux.alibaba.com,
chao.liu@processmission.com, anisinha@redhat.com,
dave.jiang@intel.com, alison.schofield@intel.com,
junjie.cao@intel.com, guoren@kernel.org, qemu-riscv@nongnu.org,
qemu-devel@nongnu.org, linux-cxl@vger.kernel.org
Subject: [PATCH v5 6/6] tests/qtest: Update RISC-V CXL ACPI golden master binaries
Date: Mon, 31 Aug 2026 21:23:37 +0800 [thread overview]
Message-ID: <20260831132340.5345-7-cp0613@linux.alibaba.com> (raw)
In-Reply-To: <20260831132340.5345-1-cp0613@linux.alibaba.com>
Populate the DSDT.cxl and CEDT.cxl golden master binaries for the
RISC-V CXL bios-tables test and empty
bios-tables-test-allowed-diff.h, following the bios-tables-test update
process.
The expected AML added by this series is:
DSDT.cxl:
Device (PC0C) // ACPI0016 CXL host bridge (pxb-cxl, bus 0x0C)
Name (_CRS, ResourceTemplate () {
DWordMemory (... 0x40400000 .. 0x405FFFFF ...) // 32-bit MMIO
QWordMemory (... 0x400100000 .. 0x40010FFFF ...) // 64-bit MMIO
WordBusNumber (... 0x000C .. 0x000D ...)
})
Method (_OSC, ...) // PCI host bridge + CXL UUIDs
Device (CXLM) // ACPI0017 CXL memory controller
Name (_HID, "ACPI0017")
Name (_DEP, Package () { \_SB.PC0C })
Method (_STA, ...) / Method (_DSM, ...)
CEDT.cxl:
CHBS : CXL Host Bridge Structure, Register base 0x800000000
CFMWS: CXL Fixed Memory Window, base 0x810000000, size 4G
Reviewed-by: Junjie Cao <junjie.cao@intel.com>
Signed-off-by: Chen Pei <cp0613@linux.alibaba.com>
---
v5:
- Regenerate DSDT.cxl against the in-tree edk2-riscv-code.fd blob the
test boots: the 64-bit window becomes 0x400100000..0x40010FFFF with
the matching PCI0 range shift.
tests/data/acpi/riscv64/virt/CEDT.cxl | Bin 0 -> 108 bytes
tests/data/acpi/riscv64/virt/DSDT.cxl | Bin 0 -> 6331 bytes
tests/qtest/bios-tables-test-allowed-diff.h | 2 --
3 files changed, 2 deletions(-)
diff --git a/tests/data/acpi/riscv64/virt/CEDT.cxl b/tests/data/acpi/riscv64/virt/CEDT.cxl
index e69de29bb2d1d6434b8b29ae775ad8c2e48c5391..81d746dfb09ccb147e26bb64060404ca3191d097 100644
GIT binary patch
literal 108
zc-nJzbqUE~U|?VjaPoKd2v%^42yj*a0!E-1hz+6{7!(+IKx!BefCEf2LP-snumA^?
O0aMEg#QH!C(hmS*@&^F`
literal 0
Hc-jL100001
diff --git a/tests/data/acpi/riscv64/virt/DSDT.cxl b/tests/data/acpi/riscv64/virt/DSDT.cxl
index e69de29bb2d1d6434b8b29ae775ad8c2e48c5391..c3d68cf3a080ab66160f6847267fe4b9f8a8c6fc 100644
GIT binary patch
literal 6331
zc-pO*%WoS+9LHzv^&{)GV>{0K;q)PKKt*52P18#i+v~J-6(`1<v=yo3h$vOtppx<u
z1tF>)3XKq=4eEu9E28obaDpO`;KHpELLiX1ap8gl2ZV%VW_E37zv))$A&#^=<DK7k
z=CfJbAFs=HdFjg`Ap)V&qIKGyES;}elk%YnAyixKlecbb7aDe{v2ydYZUKlkPFKqD
zqE)NN&WwmQmMdkstrnM3&lrb?4r@Y{c^`ZGD>sjyJZGJBgPxzOF3X@P8DTFKjaal{
zSw&55>vk$-ByRPn@?=u3Qe2mnGZm||gt~2=m6f^f5>DAAv8Pa&LaaK4R>WGYa%H|-
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z`9(~6A_DD*l8Tt}i!cIy8SrETy%~AmjG$je!IPnTGmiRZ=zbYBPe#a_G3}cX^2=ED
zWQ4sL$9yxwei@sdjEFa5#y2D4mvO_B5p8Ew^m$nAtE0A1lkJn;i=!rM6GqG#KiR$t
zt;e3rgd29<*4j}ypD2x^4){bJ;HWbyYRV@{T`b<LgFaaYeX{a?SwYS^<db!Xv*tdk
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zeskidi|(_rAOE^^`Ma&^S0_FmNzVT8-`0kq%epDKkIH?1Q*Bn?UNy3-&E(zf%i23C
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zosIhmcP_QY+|Gt;de}c{#QsSm_E8$KPtv$>uVz&|XRC<gt~0iK>MNi<cS<<c*gcQR
z8MDS%O<1BLJ#kWgBYJ9cgvT7=HAi^O5oC@aa|D|s*c?IT2r@^oIfBg*WR4(n1e+t+
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z*c?IT2r@^oIfBg*WR4(n1e+t+96{y?GDomEg3S?Rjv#Xcn<Lm9LFNcDN3c19%@Jgd
zAaewpBiJ0}EE%(5m5O3VxgOk)@`7nR?C75mF-HQuS}CMf&bGC(Ku1>Pk=DCzyE!Y5
zXlAgZmGZ+`J%UOw_o}F9t7z{Y6-_$Zy`xj@(ar~q=kaIDy;+)>kFb!2{C)I^<~i|{
z=IMCmeUk(+bEHwWt9tW*JLjXB?|-+a->Tjj{G&SjtyOLIY+n&Osi5X=R&G}H`kYNV
z*|GV&fyd4h+%wsl-E&9ZIZ@6n&9HTTzDhUg)K3KExmw!PE<C4xM^Jb1GCk^Mzt}Ni
unHjZSvk7;-5B^>M`?t@o6&_sq+>9-LSnsY^YbLg@Xgld>KuhaVcK!!2ury2n
literal 0
Hc-jL100001
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h
index c05fb697a5..dfb8523c8b 100644
--- a/tests/qtest/bios-tables-test-allowed-diff.h
+++ b/tests/qtest/bios-tables-test-allowed-diff.h
@@ -1,3 +1 @@
/* List of comma-separated changed AML files to ignore */
-"riscv64/virt/DSDT.cxl",
-"riscv64/virt/CEDT.cxl",
--
2.50.1
next prev parent reply other threads:[~2026-08-31 13:24 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-31 13:23 [PATCH v5 0/6] hw/riscv/virt: Add CXL support to the RISC-V virt machine Chen Pei
2026-08-31 13:23 ` [PATCH v5 1/6] " Chen Pei
2026-09-04 6:30 ` Junjie Cao
2026-08-31 13:23 ` [PATCH v5 2/6] hw/riscv/virt-acpi-build: Add _DEP to ACPI0017 for CXL host bridge dependency Chen Pei
2026-09-04 6:31 ` Junjie Cao
2026-08-31 13:23 ` [PATCH v5 3/6] hw/riscv/virt: Advertise the CXL host bridge to firmware via extra-pci-roots Chen Pei
2026-08-31 13:23 ` [PATCH v5 4/6] tests/qtest: Prepare golden files for the RISC-V CXL ACPI test Chen Pei
2026-08-31 13:23 ` [PATCH v5 5/6] tests/qtest: Add RISC-V ACPI bios tables test for CXL Chen Pei
2026-09-04 6:31 ` Junjie Cao
2026-08-31 13:23 ` Chen Pei [this message]
2026-09-04 6:31 ` [PATCH v5 6/6] tests/qtest: Update RISC-V CXL ACPI golden master binaries Junjie Cao
2026-09-04 14:23 ` [PATCH v5 0/6] hw/riscv/virt: Add CXL support to the RISC-V virt machine Michael S. Tsirkin
2026-09-07 6:48 ` Chen Pei
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