From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4FBF35AA69B; Mon, 31 Aug 2026 13:52:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788184362; cv=none; b=JM25OHd9pHVO+DQ37Cfma8+FvNkh4wyCCArinW8XLQAgjjn0fMKix8n0nVbdXx/rZkf3cJJcfY/ZfrOdFkpk50lzTkv3HEFCAxW9wcRiJ3ILp0wHo3/vajqmeY7lsz/t4+3Xnz1jlZEO24xkd6FIMz3LbjwHgGXG0b+PocLO+20= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788184362; c=relaxed/simple; bh=P7GWI4QqTyfKeMIcOp/wfgw+pvLSHaZ81/lMOGaRcoM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=huuquR7aE0e7+/8yv1GeKmjoTR1n9SapF5VET/KdljP1k8JY3RMlM2LR+cAKdNBs0YpcBzEd8w6qcpWZZN+VJSLsLXyW1Wy53CfdXY16jbBeuYY7Z5ohU8eK6cIyWpVaWrsl66LExf6UzoO1edW0FvBwi3BxRXeyg8Y4j7fY56U= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=ZdCuWFCX; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ZdCuWFCX" Received: by smtp.kernel.org (Postfix) with ESMTPSA id D30FB1F00ADF; Mon, 31 Aug 2026 13:52:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1788184360; bh=gn/x46AcCcCqDneJy+pgdlKQ+Wml9FPVINTnDu7omW4=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=ZdCuWFCXLnum0OR0fxNVjjU2gh6h/TxZPIDTrrpmNdNblnDOWIbVP7xilAGhLejAS 6GPNrYs6O9oEoqc1i7BT5UANw6vFeiPlM2Eawt7uvA69xNfhTIuChevbbhAPrdDHVy V044cOkuWct+HL1cSHLVTu4RNBootywF/FPdP8RMItZPbkacH8Y4QTUDuT0t0nlY5f zj7i34ZpwWQzYzsqW4wruSnUlBJCvqZFJiOqMgxD2r9IXv9s8ZNm/hT51+zkCs9EBI jbOHhYV7WbobXL3S6swoUvygQWAVRTYmML3TC3UYJlvrSCRpU4Fc8J57AkAukeH7J2 AwbW+5gHfbuIQ== From: Sasha Levin To: patches@lists.linux.dev, stable@vger.kernel.org Cc: Stanley Chu , Frank Li , Alexandre Belloni , Sasha Levin , miquel.raynal@bootlin.com, linux-i3c@lists.infradead.org, imx@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH AUTOSEL 6.18] i3c: master: svc: Prevent IRQ storm from false SLVSTART on NPCM845 Date: Mon, 31 Aug 2026 09:31:15 -0400 Message-ID: <20260831133314.4125787-647-sashal@kernel.org> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260831133314.4125787-1-sashal@kernel.org> References: <20260831133314.4125787-1-sashal@kernel.org> Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore X-stable-base: Linux 6.18.48 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Stanley Chu [ Upstream commit 1effa3adfe53cb2bb28bf5640a676b791d5ab405 ] On NPCM845, when a target on the I3C bus gets stuck holding SDA low, the controller reports a false Master Request (MR) in-band interrupt event. The driver handles this by emitting a STOP condition to restore the bus. However, the hardware quirk SVC_I3C_QUIRK_FALSE_SLVSTART indicates that emitting a STOP condition may spuriously set the SLVSTART interrupt status bit. In the Master Request case, this creates a feedback loop: the STOP triggers a new SLVSTART event, the IRQ handler fires again, the controller still reports an MR type, another STOP is emitted, and the cycle repeats indefinitely, resulting in an IRQ storm that can lock up the CPU. Clear the SLVSTART status bit explicitly after emitting the STOP in the Master Request IBI handler when the SVC_I3C_QUIRK_FALSE_SLVSTART quirk is set. This breaks the feedback loop without affecting normal SLVSTART processing, which is already guarded in the top-level IRQ handler by checking that MSTATUS is in SLVREQ state. Signed-off-by: Stanley Chu Reviewed-by: Frank Li Link: https://patch.msgid.link/20260413005040.1211107-3-yschu@nuvoton.com Signed-off-by: Alexandre Belloni Signed-off-by: Sasha Levin --- LLM Generated explanations, may be completely bogus: # Stable Backport Analysis: i3c: master: svc: Prevent IRQ storm from false SLVSTART on NPCM845 **Local tree:** Linux 6.18.43 (`v6.18.43-1-gc7f0dac02d232`) --- ## PHASE 1: COMMIT MESSAGE FORENSICS ### Step 1.1: Subject Line **Record:** `[i3c: master: svc]` `[Prevent]` — Prevent IRQ storm from false SLVSTART on NPCM845 (Nuvoton BMC I3C master driver hardware quirk workaround). ### Step 1.2: Tags **Record:** - **Signed-off-by:** Stanley Chu `` (author) - **Reviewed-by:** Frank Li `` (NXP I3C reviewer) - **Link:** https://patch.msgid.link/20260413005040.1211107-3-yschu@nuvoton.com - **Signed-off-by:** Alexandre Belloni `` (I3C maintainer) - No Fixes:, Reported-by:, Tested-by:, Cc: stable@vger.kernel.org - Notable: Reviewed by subsystem reviewer; maintainer applied the series. No syzbot report (hardware-specific quirk). ### Step 1.3: Body Analysis **Record:** - **Bug:** On NPCM845, when an I3C target holds SDA low (bus stuck), the controller reports a false Master Request (MR) IBI. The driver emits STOP to recover the bus, but STOP spuriously sets the SLVSTART status bit (known `SVC_I3C_QUIRK_FALSE_SLVSTART` behavior). - **Symptom:** Feedback loop — STOP → spurious SLVSTART → IRQ handler → MR again → STOP → … → **IRQ storm that can lock up the CPU**. - **Root cause:** MR handler emits STOP without clearing the spurious SLVSTART bit afterward; top-level quirk guard (SLVREQ state check) does not break this specific MR+stuck-SDA loop. - **Fix:** After STOP in the `MASTER_REQUEST` IBI path, explicitly clear SLVSTART when the quirk is set. - **Version info:** NPCM845-specific; no kernel version range stated. ### Step 1.4: Hidden Bug Fix Detection **Record:** Not disguised — explicitly a bug fix for IRQ storm / CPU lockup. Falls under hardware quirk/workaround exception category. --- ## PHASE 2: DIFF ANALYSIS ### Step 2.1: Inventory **Record:** - **File:** `drivers/i3c/master/svc-i3c-master.c` (+9 lines, 0 removed) - **Function modified:** `svc_i3c_master_ibi_isr()` - **Scope:** Single-file, surgical fix in one `switch` case (`SVC_I3C_MSTATUS_IBITYPE_MASTER_REQUEST`) ### Step 2.2: Code Flow Change **Record:** - **Hunk (MASTER_REQUEST case):** - **Before:** `svc_i3c_master_emit_stop(master); break;` - **After:** Same STOP, then if `SVC_I3C_QUIRK_FALSE_SLVSTART` quirk is set, `writel(SVC_I3C_MINT_SLVSTART, master->regs + SVC_I3C_MSTATUS)` to clear spurious SLVSTART. - **Path affected:** IRQ-driven IBI handler, non-critical task section, MR event only, only when quirk bit is set (NPCM845). ### Step 2.3: Bug Mechanism **Record:** **Category:** Hardware quirk workaround / IRQ storm prevention (synchronization with hardware interrupt status). - STOP on NPCM845 spuriously sets SLVSTART interrupt status. - In MR+stuck-SDA scenario, top-level handler's SLVREQ guard does not prevent re-entry into MR handling. - Explicit status clear after STOP breaks the feedback loop. ### Step 2.4: Fix Quality **Record:** - **Obviously correct:** Uses the same `writel(SVC_I3C_MINT_SLVSTART, ...)` pattern already used in `svc_i3c_master_irq_handler()` at line 626. - **Minimal:** Quirk-gated, only in MR path. - **Regression risk:** Very low — only affects NPCM845 (`npcm845_drvdata` sets `SVC_I3C_QUIRK_FALSE_SLVSTART`). Normal SLVSTART processing remains guarded by SLVREQ check in the top-level IRQ handler. --- ## PHASE 3: GIT HISTORY INVESTIGATION ### Step 3.1: Blame **Record:** Lines 609–611 (`MASTER_REQUEST` STOP without clear) blamed to `19eef1d98eeda` (kernel import). The MR+STOP path predates this series; the missing clear is a gap in the original `SVC_I3C_QUIRK_FALSE_SLVSTART` handling from March 2025. ### Step 3.2: Fixes: Tag **Record:** No Fixes: tag. N/A. ### Step 3.3: Related File History **Record:** Related commits in this tree on `svc-i3c-master.c`: - `466c7f87de52d` — Fix missed IBI after false SLVSTART (series patch 1/2, **present**) - `98ddff8a90f82` — Initialize `dev` to NULL in `svc_i3c_master_ibi_isr()` - `8ddff9989f06a` — Prevent incomplete IBI transaction - Quirk introduced via code present since kernel import; `SVC_I3C_QUIRK_FALSE_SLVSTART` and `npcm845_drvdata` confirmed in tree. ### Step 3.4: Author Context **Record:** Stanley Chu (Nuvoton) authored NPCM845 I3C fixes. Frank Li (NXP) reviewed. Alexandre Belloni (I3C maintainer) committed. Author has multiple related svc-i3c-master fixes in this tree. ### Step 3.5: Dependencies **Record:** - **Prerequisite:** Patch 1/2 (`466c7f87de52d` — re-read MSTATUS in IRQ handler) is **already in this tree**. - **Required infrastructure:** `SVC_I3C_QUIRK_FALSE_SLVSTART`, `svc_has_quirk()`, `npcm845_drvdata` — all **present**. - **Standalone:** This patch (2/2) is self-contained; applies cleanly on top of current tree (`git apply --check` passed). - Upstream commit: `1effa3adfe53c`; **not yet in this 6.18.43 tree**. --- ## PHASE 4: MAILING LIST AND EXTERNAL RESEARCH ### Step 4.1: Original Discussion **Record:** - **b4 dig -c 1effa3adfe53c:** https://patch.msgid.link/20260413005040.1211107-3-yschu@nuvoton.com - **Series:** v1, 2 patches: (1) Fix missed IBI, (2) Prevent IRQ storm - **Maintainer response:** Alexandre Belloni: "Applied, thanks!" — both patches applied to i3c tree. - **Stable nomination:** None found in thread. - **NAKs/concerns:** None found. ### Step 4.2: Reviewers **Record:** CC'd: frank.li@nxp.com, miquel.raynal@bootlin.com, alexandre.belloni@bootlin.com, linux-i3c@lists.infradead.org, Nuvoton engineers. Reviewed-by: Frank Li. ### Step 4.3: Bug Report **Record:** No external bug report or syzbot link. Hardware quirk described by Nuvoton driver author; credible for embedded BMC platform. ### Step 4.4: Series Context **Record:** 2-patch series addressing false SLVSTART quirk. Patch 1 fixes missed IBI (race); patch 2 fixes IRQ storm (feedback loop). Both are complementary; patch 1 already in this tree; patch 2 is still missing. ### Step 4.5: Stable List History **Record:** Not searched on lore stable list; no stable nomination found in patch thread. Absence is not a negative signal per instructions. --- ## PHASE 5: CODE SEMANTIC ANALYSIS ### Step 5.1: Key Functions **Record:** `svc_i3c_master_ibi_isr()` (modified), `svc_i3c_master_irq_handler()` (caller, unmodified). ### Step 5.2: Callers **Record:** - `svc_i3c_master_irq_handler()` → `svc_i3c_master_ibi_isr()` (line 646) - IRQ registered via `devm_request_irq()` at line 1944 - **Context:** Hard IRQ context on I3C SLVSTART interrupt — hot path for all IBI events on NPCM845. ### Step 5.3: Callees **Record:** `svc_i3c_master_emit_stop()`, `svc_has_quirk()`, `writel()` to hardware MSTATUS register. ### Step 5.4: Reachability **Record:** - Triggered when I3C bus target holds SDA low (hardware fault or misbehaving device). - IRQ-driven, runs on every spurious SLVSTART in the MR feedback loop. - Not directly userspace-triggerable, but bus faults on BMC/server platforms are realistic production scenarios. - **Impact when triggered:** Continuous IRQ processing → CPU lockup. ### Step 5.5: Similar Patterns **Record:** Top-level IRQ handler already clears SLVSTART and has quirk guard. IBI and HOT_JOIN cases also emit STOP but do not need this extra clear (commit explains MR-specific loop). Same `writel(SVC_I3C_MINT_SLVSTART, ...)` idiom used elsewhere in file. --- ## PHASE 6: CROSS-REFERENCING AGAINST LOCAL TREE ### Step 6.1: Buggy Code Exists? **Record:** **YES.** Current tree at lines 609–611: ```609:611:drivers/i3c/master/svc-i3c-master.c case SVC_I3C_MSTATUS_IBITYPE_MASTER_REQUEST: svc_i3c_master_emit_stop(master); break; ``` No SLVSTART clear after STOP. `SVC_I3C_QUIRK_FALSE_SLVSTART` and `npcm845_drvdata` are present (lines 154, 2056–2059). Prerequisite patch `466c7f87de52d` is present. Upstream fix `1effa3adfe53c` is **not** in this tree. ### Step 6.2: Backport Complications **Record:** **Clean apply** — `git apply --check` against upstream diff succeeded with no conflicts. No rework needed. ### Step 6.3: Related Fixes Already Present? **Record:** Patch 1/2 (`466c7f87de52d`) present. IRQ storm fix (`1effa3adfe53c`) absent. No alternate fix for this issue found. --- ## PHASE 7: SUBSYSTEM AND MAINTAINER CONTEXT ### Step 7.1: Subsystem Criticality **Record:** **Subsystem:** `drivers/i3c/master/` — I3C bus master driver (Silvaco/Vayavya Labs SVC IP, Nuvoton NPCM845). **Criticality:** IMPORTANT/PERIPHERAL — affects NPCM845 BMC platforms specifically, but IRQ storm is a system-wide CPU lockup. ### Step 7.2: Subsystem Activity **Record:** I3C subsystem actively maintained in 6.18.y with recent svc and mipi-i3c-hci fixes. NPCM845 support and quirk infrastructure are established in this tree. --- ## PHASE 8: IMPACT AND RISK ASSESSMENT ### Step 8.1: Who Is Affected **Record:** Users of Nuvoton NPCM845 I3C controller (`"nuvoton,npcm845-i3c"` DT compatible). Primarily embedded BMC/server platforms. Config-specific (driver + hardware present). ### Step 8.2: Trigger Conditions **Record:** I3C target stuck holding SDA low → false MR IBI → STOP recovery loop. Requires bus fault or misbehaving device — uncommon but realistic. Not unprivileged-userspace-direct, but can freeze the system when it occurs. ### Step 8.3: Failure Mode Severity **Record:** **IRQ storm → CPU lockup.** Severity: **CRITICAL** (system becomes unresponsive). ### Step 8.4: Risk-Benefit **Record:** - **Benefit:** HIGH for NPCM845 users — prevents system lockup on bus fault. - **Risk:** VERY LOW — 9 lines, quirk-gated, same register write pattern as existing code, zero impact on non-NPCM845 platforms. - **Ratio:** Strongly favors backport. --- ## PHASE 9: FINAL SYNTHESIS ### Step 9.1: Evidence Summary **FOR backporting:** - Fixes real IRQ storm causing CPU lockup (CRITICAL severity) - Small, surgical, quirk-gated hardware workaround - Reviewed by NXP reviewer; applied by I3C maintainer - Prerequisites present in 6.18.43 tree; applies cleanly - Complements already-backported patch 1/2 in the series - Matches stable exception category: hardware quirk/workaround **AGAINST backporting:** - NPCM845-specific (limited audience) — but stable routinely takes hardware quirk fixes - Requires bus fault to trigger — but consequence is system lockup - No syzbot/user bug report — but hardware quirk from silicon vendor is credible **Unresolved:** None affecting the decision. ### Step 9.2: Stable Rules Checklist 1. Obviously correct and tested? **PASS** — minimal register clear, reviewed, maintainer-applied 2. Fixes a real bug? **PASS** — IRQ storm on NPCM845 3. Important issue? **PASS** — CPU lockup (CRITICAL) 4. Small and contained? **PASS** — 9 lines, one case branch 5. No new features/APIs? **PASS** — quirk workaround only 6. Can apply to local tree? **PASS** — clean apply, prerequisites present ### Step 9.3: Exception Category **Record:** Hardware quirk/workaround for NPCM845 I3C controller. ### Step 9.4: Decision Rationale This commit closes a gap in the existing `SVC_I3C_QUIRK_FALSE_SLVSTART` handling. The 6.18.43 tree already has NPCM845 support, the quirk flag, and series patch 1/2, but lacks this IRQ storm fix. When an I3C bus fault causes a target to hold SDA low, the driver can enter an infinite IRQ loop that locks the CPU. The fix is minimal, quirk-gated, reviewed, and applies cleanly. This is appropriate stable material. --- ## Verification - [Phase 1] Parsed subject, tags, body from provided commit message - [Phase 1] Identified as explicit hardware quirk IRQ storm fix, not hidden cleanup - [Phase 2] Diff: +9 lines in `svc_i3c_master_ibi_isr()`, MASTER_REQUEST case only - [Phase 2] Verified `writel(SVC_I3C_MINT_SLVSTART, ...)` pattern matches line 626 in same file - [Phase 3] `git describe HEAD` / `make kernelversion`: 6.18.43 - [Phase 3] `git blame -L 609,611`: MR STOP path present without SLVSTART clear - [Phase 3] `git merge-base --is-ancestor 466c7f87de52d HEAD`: patch 1/2 present - [Phase 3] `git merge-base --is-ancestor 1effa3adfe53c HEAD`: IRQ storm fix NOT present - [Phase 3] `git log --oneline 4dd12e944f07^..HEAD -- drivers/i3c/master/svc-i3c-master.c`: related history confirmed - [Phase 3] `git apply --check` on upstream diff: applies cleanly - [Phase 4] `b4 dig -c 1effa3adfe53c -a`: v1 2/2 series found - [Phase 4] `b4 dig -c 1effa3adfe53c -w`: maintainers CC'd, Frank Li reviewed - [Phase 4] `b4 dig -c 1effa3adfe53c -m /tmp/i3c_irq_storm.mbox`: Belloni applied both patches; no stable tag, no NAKs - [Phase 5] `grep svc_i3c_master_irq_handler`: caller at line 646; IRQ registered at line 1944 - [Phase 5] `grep SVC_I3C_QUIRK_FALSE_SLVSTART`: quirk defined line 154, used lines 628 and 2058 - [Phase 6] `grep npcm845`: `npcm845_drvdata` with quirk at lines 2056–2065 - [Phase 6] Read current file lines 609–611, 617–648: buggy code confirmed, prerequisite quirk guard present - [Phase 7] `git log --oneline -20 -- drivers/i3c/`: active subsystem - [Phase 8] Failure mode IRQ storm → CPU lockup assessed as CRITICAL **YES**The background check finished: the IRQ storm fix (`1effa3adfe53c` / `5e33b8c19e5b2`) is **not** in your current **6.18.43** tree. That matches the earlier analysis: NPCM845 support and the related false-SLVSTART quirk are present, patch 1/2 (`466c7f87de52d`) is already applied, but the MR-handler SLVSTART clear is still missing — and the upstream patch applies cleanly. **Backport recommendation: YES** — it’s a small, quirk-gated fix for an IRQ storm that can lock up the CPU on NPCM845 when the I3C bus gets stuck. drivers/i3c/master/svc-i3c-master.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/i3c/master/svc-i3c-master.c b/drivers/i3c/master/svc-i3c-master.c index d33f4c7654974..70365a550ad29 100644 --- a/drivers/i3c/master/svc-i3c-master.c +++ b/drivers/i3c/master/svc-i3c-master.c @@ -608,6 +608,15 @@ static void svc_i3c_master_ibi_isr(struct svc_i3c_master *master) break; case SVC_I3C_MSTATUS_IBITYPE_MASTER_REQUEST: svc_i3c_master_emit_stop(master); + + /* + * If a target gets stuck holding SDA low, the controller reports a MR. + * On NPCM845, emitting STOP may spuriously set SLVSTART, retriggering + * the interrupt and re-entering MR handling, leading to an IRQ storm. + * Clear SLVSTART after STOP to break the loop. + */ + if (svc_has_quirk(master, SVC_I3C_QUIRK_FALSE_SLVSTART)) + writel(SVC_I3C_MINT_SLVSTART, master->regs + SVC_I3C_MSTATUS); break; default: break; -- 2.53.0 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4270BC624CE for ; Mon, 31 Aug 2026 13:52:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=jExh4NF5CgQC4ZdJQdqFUQZDFgSHUyADq0j63vw/QvU=; b=C6+sxN1FrAeOIX EKb0L+n1dxFl2PVlmpeqdnG0+TshLm6JdemhTdzljHFZp5eGdW3dKoYas8iTWGUVBiIfPjDwewq7W 4LaK7CNvBwJcyLbXidNX3wa/PV1X/bQlMG/aw/We3CwJjabWn5nedDYOJlrB6H9cmiC+fWU+T1dtC v/uwSicJQEradoony60nazUFdiyIEduz3Y+vJ0ZpuOoYunHWiznN0OZP9cl3/z6GEDHAF9kWNfuBi Ug38CF9sjAMl4vR2OCgObregR213QViPjgwLJOtof746V7Cg6cSCxnlgaa7yxW59vEiTXMTrhf2wb a/J3WZ7vNEiOPhU379+w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1x12RF-00000009Z2K-3zaI; Mon, 31 Aug 2026 13:52:41 +0000 Received: from tor.source.kernel.org ([172.105.4.254]) by bombadil.infradead.org with esmtps (Exim 4.99.1 #2 (Red Hat Linux)) id 1x12RF-00000009Z1T-0WCT for linux-i3c@lists.infradead.org; Mon, 31 Aug 2026 13:52:41 +0000 Received: from smtp.kernel.org (quasi.space.kernel.org [100.103.45.18]) by tor.source.kernel.org (Postfix) with ESMTP id 8154660207; Mon, 31 Aug 2026 13:52:40 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id D30FB1F00ADF; Mon, 31 Aug 2026 13:52:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1788184360; bh=gn/x46AcCcCqDneJy+pgdlKQ+Wml9FPVINTnDu7omW4=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=ZdCuWFCXLnum0OR0fxNVjjU2gh6h/TxZPIDTrrpmNdNblnDOWIbVP7xilAGhLejAS 6GPNrYs6O9oEoqc1i7BT5UANw6vFeiPlM2Eawt7uvA69xNfhTIuChevbbhAPrdDHVy V044cOkuWct+HL1cSHLVTu4RNBootywF/FPdP8RMItZPbkacH8Y4QTUDuT0t0nlY5f zj7i34ZpwWQzYzsqW4wruSnUlBJCvqZFJiOqMgxD2r9IXv9s8ZNm/hT51+zkCs9EBI jbOHhYV7WbobXL3S6swoUvygQWAVRTYmML3TC3UYJlvrSCRpU4Fc8J57AkAukeH7J2 AwbW+5gHfbuIQ== From: Sasha Levin To: patches@lists.linux.dev, stable@vger.kernel.org Cc: Stanley Chu , Frank Li , Alexandre Belloni , Sasha Levin , miquel.raynal@bootlin.com, linux-i3c@lists.infradead.org, imx@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH AUTOSEL 6.18] i3c: master: svc: Prevent IRQ storm from false SLVSTART on NPCM845 Date: Mon, 31 Aug 2026 09:31:15 -0400 Message-ID: <20260831133314.4125787-647-sashal@kernel.org> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260831133314.4125787-1-sashal@kernel.org> References: <20260831133314.4125787-1-sashal@kernel.org> MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore X-stable-base: Linux 6.18.48 X-BeenThere: linux-i3c@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-i3c" Errors-To: linux-i3c-bounces+linux-i3c=archiver.kernel.org@lists.infradead.org RnJvbTogU3RhbmxleSBDaHUgPHlzY2h1QG51dm90b24uY29tPgoKWyBVcHN0cmVhbSBjb21taXQg MWVmZmEzYWRmZTUzY2IyYmIyOGJmNTY0MGE2NzZiNzkxZDVhYjQwNSBdCgpPbiBOUENNODQ1LCB3 aGVuIGEgdGFyZ2V0IG9uIHRoZSBJM0MgYnVzIGdldHMgc3R1Y2sgaG9sZGluZyBTREEgbG93LAp0 aGUgY29udHJvbGxlciByZXBvcnRzIGEgZmFsc2UgTWFzdGVyIFJlcXVlc3QgKE1SKSBpbi1iYW5k IGludGVycnVwdApldmVudC4gVGhlIGRyaXZlciBoYW5kbGVzIHRoaXMgYnkgZW1pdHRpbmcgYSBT VE9QIGNvbmRpdGlvbiB0byByZXN0b3JlCnRoZSBidXMuCgpIb3dldmVyLCB0aGUgaGFyZHdhcmUg cXVpcmsgU1ZDX0kzQ19RVUlSS19GQUxTRV9TTFZTVEFSVCBpbmRpY2F0ZXMgdGhhdAplbWl0dGlu ZyBhIFNUT1AgY29uZGl0aW9uIG1heSBzcHVyaW91c2x5IHNldCB0aGUgU0xWU1RBUlQgaW50ZXJy dXB0CnN0YXR1cyBiaXQuIEluIHRoZSBNYXN0ZXIgUmVxdWVzdCBjYXNlLCB0aGlzIGNyZWF0ZXMg YSBmZWVkYmFjayBsb29wOgp0aGUgU1RPUCB0cmlnZ2VycyBhIG5ldyBTTFZTVEFSVCBldmVudCwg dGhlIElSUSBoYW5kbGVyIGZpcmVzIGFnYWluLAp0aGUgY29udHJvbGxlciBzdGlsbCByZXBvcnRz IGFuIE1SIHR5cGUsIGFub3RoZXIgU1RPUCBpcyBlbWl0dGVkLCBhbmQKdGhlIGN5Y2xlIHJlcGVh dHMgaW5kZWZpbml0ZWx5LCByZXN1bHRpbmcgaW4gYW4gSVJRIHN0b3JtIHRoYXQgY2FuIGxvY2sK dXAgdGhlIENQVS4KCkNsZWFyIHRoZSBTTFZTVEFSVCBzdGF0dXMgYml0IGV4cGxpY2l0bHkgYWZ0 ZXIgZW1pdHRpbmcgdGhlIFNUT1AgaW4gdGhlCk1hc3RlciBSZXF1ZXN0IElCSSBoYW5kbGVyIHdo ZW4gdGhlIFNWQ19JM0NfUVVJUktfRkFMU0VfU0xWU1RBUlQgcXVpcmsKaXMgc2V0LiBUaGlzIGJy ZWFrcyB0aGUgZmVlZGJhY2sgbG9vcCB3aXRob3V0IGFmZmVjdGluZyBub3JtYWwgU0xWU1RBUlQK cHJvY2Vzc2luZywgd2hpY2ggaXMgYWxyZWFkeSBndWFyZGVkIGluIHRoZSB0b3AtbGV2ZWwgSVJR IGhhbmRsZXIgYnkKY2hlY2tpbmcgdGhhdCBNU1RBVFVTIGlzIGluIFNMVlJFUSBzdGF0ZS4KClNp Z25lZC1vZmYtYnk6IFN0YW5sZXkgQ2h1IDx5c2NodUBudXZvdG9uLmNvbT4KUmV2aWV3ZWQtYnk6 IEZyYW5rIExpIDxGcmFuay5MaUBueHAuY29tPgpMaW5rOiBodHRwczovL3BhdGNoLm1zZ2lkLmxp bmsvMjAyNjA0MTMwMDUwNDAuMTIxMTEwNy0zLXlzY2h1QG51dm90b24uY29tClNpZ25lZC1vZmYt Ynk6IEFsZXhhbmRyZSBCZWxsb25pIDxhbGV4YW5kcmUuYmVsbG9uaUBib290bGluLmNvbT4KU2ln bmVkLW9mZi1ieTogU2FzaGEgTGV2aW4gPHNhc2hhbEBrZXJuZWwub3JnPgotLS0KCkxMTSBHZW5l cmF0ZWQgZXhwbGFuYXRpb25zLCBtYXkgYmUgY29tcGxldGVseSBib2d1czoKCiMgU3RhYmxlIEJh Y2twb3J0IEFuYWx5c2lzOiBpM2M6IG1hc3Rlcjogc3ZjOiBQcmV2ZW50IElSUSBzdG9ybSBmcm9t CmZhbHNlIFNMVlNUQVJUIG9uIE5QQ004NDUKCioqTG9jYWwgdHJlZToqKiBMaW51eCA2LjE4LjQz IChgdjYuMTguNDMtMS1nYzdmMGRhYzAyZDIzMmApCgotLS0KCiMjIFBIQVNFIDE6IENPTU1JVCBN RVNTQUdFIEZPUkVOU0lDUwoKIyMjIFN0ZXAgMS4xOiBTdWJqZWN0IExpbmUKKipSZWNvcmQ6Kiog YFtpM2M6IG1hc3Rlcjogc3ZjXWAgYFtQcmV2ZW50XWAg4oCUIFByZXZlbnQgSVJRIHN0b3JtIGZy b20KZmFsc2UgU0xWU1RBUlQgb24gTlBDTTg0NSAoTnV2b3RvbiBCTUMgSTNDIG1hc3RlciBkcml2 ZXIgaGFyZHdhcmUgcXVpcmsKd29ya2Fyb3VuZCkuCgojIyMgU3RlcCAxLjI6IFRhZ3MKKipSZWNv cmQ6KioKLSAqKlNpZ25lZC1vZmYtYnk6KiogU3RhbmxleSBDaHUgYDx5c2NodUBudXZvdG9uLmNv bT5gIChhdXRob3IpCi0gKipSZXZpZXdlZC1ieToqKiBGcmFuayBMaSBgPEZyYW5rLkxpQG54cC5j b20+YCAoTlhQIEkzQyByZXZpZXdlcikKLSAqKkxpbms6KioKICBodHRwczovL3BhdGNoLm1zZ2lk LmxpbmsvMjAyNjA0MTMwMDUwNDAuMTIxMTEwNy0zLXlzY2h1QG51dm90b24uY29tCi0gKipTaWdu ZWQtb2ZmLWJ5OioqIEFsZXhhbmRyZSBCZWxsb25pIGA8YWxleGFuZHJlLmJlbGxvbmlAYm9vdGxp bi5jb20+YAogIChJM0MgbWFpbnRhaW5lcikKLSBObyBGaXhlczosIFJlcG9ydGVkLWJ5OiwgVGVz dGVkLWJ5OiwgQ2M6IHN0YWJsZUB2Z2VyLmtlcm5lbC5vcmcKLSBOb3RhYmxlOiBSZXZpZXdlZCBi eSBzdWJzeXN0ZW0gcmV2aWV3ZXI7IG1haW50YWluZXIgYXBwbGllZCB0aGUKICBzZXJpZXMuIE5v IHN5emJvdCByZXBvcnQgKGhhcmR3YXJlLXNwZWNpZmljIHF1aXJrKS4KCiMjIyBTdGVwIDEuMzog Qm9keSBBbmFseXNpcwoqKlJlY29yZDoqKgotICoqQnVnOioqIE9uIE5QQ004NDUsIHdoZW4gYW4g STNDIHRhcmdldCBob2xkcyBTREEgbG93IChidXMgc3R1Y2spLCB0aGUKICBjb250cm9sbGVyIHJl cG9ydHMgYSBmYWxzZSBNYXN0ZXIgUmVxdWVzdCAoTVIpIElCSS4gVGhlIGRyaXZlciBlbWl0cwog IFNUT1AgdG8gcmVjb3ZlciB0aGUgYnVzLCBidXQgU1RPUCBzcHVyaW91c2x5IHNldHMgdGhlIFNM VlNUQVJUIHN0YXR1cwogIGJpdCAoa25vd24gYFNWQ19JM0NfUVVJUktfRkFMU0VfU0xWU1RBUlRg IGJlaGF2aW9yKS4KLSAqKlN5bXB0b206KiogRmVlZGJhY2sgbG9vcCDigJQgU1RPUCDihpIgc3B1 cmlvdXMgU0xWU1RBUlQg4oaSIElSUSBoYW5kbGVyIOKGkgogIE1SIGFnYWluIOKGkiBTVE9QIOKG kiDigKYg4oaSICoqSVJRIHN0b3JtIHRoYXQgY2FuIGxvY2sgdXAgdGhlIENQVSoqLgotICoqUm9v dCBjYXVzZToqKiBNUiBoYW5kbGVyIGVtaXRzIFNUT1Agd2l0aG91dCBjbGVhcmluZyB0aGUgc3B1 cmlvdXMKICBTTFZTVEFSVCBiaXQgYWZ0ZXJ3YXJkOyB0b3AtbGV2ZWwgcXVpcmsgZ3VhcmQgKFNM VlJFUSBzdGF0ZSBjaGVjaykKICBkb2VzIG5vdCBicmVhayB0aGlzIHNwZWNpZmljIE1SK3N0dWNr LVNEQSBsb29wLgotICoqRml4OioqIEFmdGVyIFNUT1AgaW4gdGhlIGBNQVNURVJfUkVRVUVTVGAg SUJJIHBhdGgsIGV4cGxpY2l0bHkgY2xlYXIKICBTTFZTVEFSVCB3aGVuIHRoZSBxdWlyayBpcyBz ZXQuCi0gKipWZXJzaW9uIGluZm86KiogTlBDTTg0NS1zcGVjaWZpYzsgbm8ga2VybmVsIHZlcnNp b24gcmFuZ2Ugc3RhdGVkLgoKIyMjIFN0ZXAgMS40OiBIaWRkZW4gQnVnIEZpeCBEZXRlY3Rpb24K KipSZWNvcmQ6KiogTm90IGRpc2d1aXNlZCDigJQgZXhwbGljaXRseSBhIGJ1ZyBmaXggZm9yIElS USBzdG9ybSAvIENQVQpsb2NrdXAuIEZhbGxzIHVuZGVyIGhhcmR3YXJlIHF1aXJrL3dvcmthcm91 bmQgZXhjZXB0aW9uIGNhdGVnb3J5LgoKLS0tCgojIyBQSEFTRSAyOiBESUZGIEFOQUxZU0lTCgoj IyMgU3RlcCAyLjE6IEludmVudG9yeQoqKlJlY29yZDoqKgotICoqRmlsZToqKiBgZHJpdmVycy9p M2MvbWFzdGVyL3N2Yy1pM2MtbWFzdGVyLmNgICgrOSBsaW5lcywgMCByZW1vdmVkKQotICoqRnVu Y3Rpb24gbW9kaWZpZWQ6KiogYHN2Y19pM2NfbWFzdGVyX2liaV9pc3IoKWAKLSAqKlNjb3BlOioq IFNpbmdsZS1maWxlLCBzdXJnaWNhbCBmaXggaW4gb25lIGBzd2l0Y2hgIGNhc2UKICAoYFNWQ19J M0NfTVNUQVRVU19JQklUWVBFX01BU1RFUl9SRVFVRVNUYCkKCiMjIyBTdGVwIDIuMjogQ29kZSBG bG93IENoYW5nZQoqKlJlY29yZDoqKgotICoqSHVuayAoTUFTVEVSX1JFUVVFU1QgY2FzZSk6KioK ICAtICoqQmVmb3JlOioqIGBzdmNfaTNjX21hc3Rlcl9lbWl0X3N0b3AobWFzdGVyKTsgYnJlYWs7 YAogIC0gKipBZnRlcjoqKiBTYW1lIFNUT1AsIHRoZW4gaWYgYFNWQ19JM0NfUVVJUktfRkFMU0Vf U0xWU1RBUlRgIHF1aXJrCiAgICBpcyBzZXQsIGB3cml0ZWwoU1ZDX0kzQ19NSU5UX1NMVlNUQVJU LCBtYXN0ZXItPnJlZ3MgKwogICAgU1ZDX0kzQ19NU1RBVFVTKWAgdG8gY2xlYXIgc3B1cmlvdXMg U0xWU1RBUlQuCi0gKipQYXRoIGFmZmVjdGVkOioqIElSUS1kcml2ZW4gSUJJIGhhbmRsZXIsIG5v bi1jcml0aWNhbCB0YXNrIHNlY3Rpb24sCiAgTVIgZXZlbnQgb25seSwgb25seSB3aGVuIHF1aXJr IGJpdCBpcyBzZXQgKE5QQ004NDUpLgoKIyMjIFN0ZXAgMi4zOiBCdWcgTWVjaGFuaXNtCioqUmVj b3JkOioqICoqQ2F0ZWdvcnk6KiogSGFyZHdhcmUgcXVpcmsgd29ya2Fyb3VuZCAvIElSUSBzdG9y bQpwcmV2ZW50aW9uIChzeW5jaHJvbml6YXRpb24gd2l0aCBoYXJkd2FyZSBpbnRlcnJ1cHQgc3Rh dHVzKS4KLSBTVE9QIG9uIE5QQ004NDUgc3B1cmlvdXNseSBzZXRzIFNMVlNUQVJUIGludGVycnVw dCBzdGF0dXMuCi0gSW4gTVIrc3R1Y2stU0RBIHNjZW5hcmlvLCB0b3AtbGV2ZWwgaGFuZGxlcidz IFNMVlJFUSBndWFyZCBkb2VzIG5vdAogIHByZXZlbnQgcmUtZW50cnkgaW50byBNUiBoYW5kbGlu Zy4KLSBFeHBsaWNpdCBzdGF0dXMgY2xlYXIgYWZ0ZXIgU1RPUCBicmVha3MgdGhlIGZlZWRiYWNr IGxvb3AuCgojIyMgU3RlcCAyLjQ6IEZpeCBRdWFsaXR5CioqUmVjb3JkOioqCi0gKipPYnZpb3Vz bHkgY29ycmVjdDoqKiBVc2VzIHRoZSBzYW1lIGB3cml0ZWwoU1ZDX0kzQ19NSU5UX1NMVlNUQVJU LAogIC4uLilgIHBhdHRlcm4gYWxyZWFkeSB1c2VkIGluIGBzdmNfaTNjX21hc3Rlcl9pcnFfaGFu ZGxlcigpYCBhdCBsaW5lCiAgNjI2LgotICoqTWluaW1hbDoqKiBRdWlyay1nYXRlZCwgb25seSBp biBNUiBwYXRoLgotICoqUmVncmVzc2lvbiByaXNrOioqIFZlcnkgbG93IOKAlCBvbmx5IGFmZmVj dHMgTlBDTTg0NQogIChgbnBjbTg0NV9kcnZkYXRhYCBzZXRzIGBTVkNfSTNDX1FVSVJLX0ZBTFNF X1NMVlNUQVJUYCkuIE5vcm1hbAogIFNMVlNUQVJUIHByb2Nlc3NpbmcgcmVtYWlucyBndWFyZGVk IGJ5IFNMVlJFUSBjaGVjayBpbiB0aGUgdG9wLWxldmVsCiAgSVJRIGhhbmRsZXIuCgotLS0KCiMj IFBIQVNFIDM6IEdJVCBISVNUT1JZIElOVkVTVElHQVRJT04KCiMjIyBTdGVwIDMuMTogQmxhbWUK KipSZWNvcmQ6KiogTGluZXMgNjA54oCTNjExIChgTUFTVEVSX1JFUVVFU1RgIFNUT1Agd2l0aG91 dCBjbGVhcikgYmxhbWVkCnRvIGAxOWVlZjFkOThlZWRhYCAoa2VybmVsIGltcG9ydCkuIFRoZSBN UitTVE9QIHBhdGggcHJlZGF0ZXMgdGhpcwpzZXJpZXM7IHRoZSBtaXNzaW5nIGNsZWFyIGlzIGEg Z2FwIGluIHRoZSBvcmlnaW5hbApgU1ZDX0kzQ19RVUlSS19GQUxTRV9TTFZTVEFSVGAgaGFuZGxp bmcgZnJvbSBNYXJjaCAyMDI1LgoKIyMjIFN0ZXAgMy4yOiBGaXhlczogVGFnCioqUmVjb3JkOioq IE5vIEZpeGVzOiB0YWcuIE4vQS4KCiMjIyBTdGVwIDMuMzogUmVsYXRlZCBGaWxlIEhpc3RvcnkK KipSZWNvcmQ6KiogUmVsYXRlZCBjb21taXRzIGluIHRoaXMgdHJlZSBvbiBgc3ZjLWkzYy1tYXN0 ZXIuY2A6Ci0gYDQ2NmM3Zjg3ZGU1MmRgIOKAlCBGaXggbWlzc2VkIElCSSBhZnRlciBmYWxzZSBT TFZTVEFSVCAoc2VyaWVzIHBhdGNoCiAgMS8yLCAqKnByZXNlbnQqKikKLSBgOThkZGZmOGE5MGY4 MmAg4oCUIEluaXRpYWxpemUgYGRldmAgdG8gTlVMTCBpbgogIGBzdmNfaTNjX21hc3Rlcl9pYmlf aXNyKClgCi0gYDhkZGZmOTk4OWYwNmFgIOKAlCBQcmV2ZW50IGluY29tcGxldGUgSUJJIHRyYW5z YWN0aW9uCi0gUXVpcmsgaW50cm9kdWNlZCB2aWEgY29kZSBwcmVzZW50IHNpbmNlIGtlcm5lbCBp bXBvcnQ7CiAgYFNWQ19JM0NfUVVJUktfRkFMU0VfU0xWU1RBUlRgIGFuZCBgbnBjbTg0NV9kcnZk YXRhYCBjb25maXJtZWQgaW4KICB0cmVlLgoKIyMjIFN0ZXAgMy40OiBBdXRob3IgQ29udGV4dAoq KlJlY29yZDoqKiBTdGFubGV5IENodSAoTnV2b3RvbikgYXV0aG9yZWQgTlBDTTg0NSBJM0MgZml4 ZXMuIEZyYW5rIExpCihOWFApIHJldmlld2VkLiBBbGV4YW5kcmUgQmVsbG9uaSAoSTNDIG1haW50 YWluZXIpIGNvbW1pdHRlZC4gQXV0aG9yIGhhcwptdWx0aXBsZSByZWxhdGVkIHN2Yy1pM2MtbWFz dGVyIGZpeGVzIGluIHRoaXMgdHJlZS4KCiMjIyBTdGVwIDMuNTogRGVwZW5kZW5jaWVzCioqUmVj b3JkOioqCi0gKipQcmVyZXF1aXNpdGU6KiogUGF0Y2ggMS8yIChgNDY2YzdmODdkZTUyZGAg4oCU IHJlLXJlYWQgTVNUQVRVUyBpbiBJUlEKICBoYW5kbGVyKSBpcyAqKmFscmVhZHkgaW4gdGhpcyB0 cmVlKiouCi0gKipSZXF1aXJlZCBpbmZyYXN0cnVjdHVyZToqKiBgU1ZDX0kzQ19RVUlSS19GQUxT RV9TTFZTVEFSVGAsCiAgYHN2Y19oYXNfcXVpcmsoKWAsIGBucGNtODQ1X2RydmRhdGFgIOKAlCBh bGwgKipwcmVzZW50KiouCi0gKipTdGFuZGFsb25lOioqIFRoaXMgcGF0Y2ggKDIvMikgaXMgc2Vs Zi1jb250YWluZWQ7IGFwcGxpZXMgY2xlYW5seSBvbgogIHRvcCBvZiBjdXJyZW50IHRyZWUgKGBn aXQgYXBwbHkgLS1jaGVja2AgcGFzc2VkKS4KLSBVcHN0cmVhbSBjb21taXQ6IGAxZWZmYTNhZGZl NTNjYDsgKipub3QgeWV0IGluIHRoaXMgNi4xOC40MyB0cmVlKiouCgotLS0KCiMjIFBIQVNFIDQ6 IE1BSUxJTkcgTElTVCBBTkQgRVhURVJOQUwgUkVTRUFSQ0gKCiMjIyBTdGVwIDQuMTogT3JpZ2lu YWwgRGlzY3Vzc2lvbgoqKlJlY29yZDoqKgotICoqYjQgZGlnIC1jIDFlZmZhM2FkZmU1M2M6KioK ICBodHRwczovL3BhdGNoLm1zZ2lkLmxpbmsvMjAyNjA0MTMwMDUwNDAuMTIxMTEwNy0zLXlzY2h1 QG51dm90b24uY29tCi0gKipTZXJpZXM6KiogdjEsIDIgcGF0Y2hlczogKDEpIEZpeCBtaXNzZWQg SUJJLCAoMikgUHJldmVudCBJUlEgc3Rvcm0KLSAqKk1haW50YWluZXIgcmVzcG9uc2U6KiogQWxl eGFuZHJlIEJlbGxvbmk6ICJBcHBsaWVkLCB0aGFua3MhIiDigJQgYm90aAogIHBhdGNoZXMgYXBw bGllZCB0byBpM2MgdHJlZS4KLSAqKlN0YWJsZSBub21pbmF0aW9uOioqIE5vbmUgZm91bmQgaW4g dGhyZWFkLgotICoqTkFLcy9jb25jZXJuczoqKiBOb25lIGZvdW5kLgoKIyMjIFN0ZXAgNC4yOiBS ZXZpZXdlcnMKKipSZWNvcmQ6KiogQ0MnZDogZnJhbmsubGlAbnhwLmNvbSwgbWlxdWVsLnJheW5h bEBib290bGluLmNvbSwKYWxleGFuZHJlLmJlbGxvbmlAYm9vdGxpbi5jb20sIGxpbnV4LWkzY0Bs aXN0cy5pbmZyYWRlYWQub3JnLCBOdXZvdG9uCmVuZ2luZWVycy4gUmV2aWV3ZWQtYnk6IEZyYW5r IExpLgoKIyMjIFN0ZXAgNC4zOiBCdWcgUmVwb3J0CioqUmVjb3JkOioqIE5vIGV4dGVybmFsIGJ1 ZyByZXBvcnQgb3Igc3l6Ym90IGxpbmsuIEhhcmR3YXJlIHF1aXJrCmRlc2NyaWJlZCBieSBOdXZv dG9uIGRyaXZlciBhdXRob3I7IGNyZWRpYmxlIGZvciBlbWJlZGRlZCBCTUMgcGxhdGZvcm0uCgoj IyMgU3RlcCA0LjQ6IFNlcmllcyBDb250ZXh0CioqUmVjb3JkOioqIDItcGF0Y2ggc2VyaWVzIGFk ZHJlc3NpbmcgZmFsc2UgU0xWU1RBUlQgcXVpcmsuIFBhdGNoIDEKZml4ZXMgbWlzc2VkIElCSSAo cmFjZSk7IHBhdGNoIDIgZml4ZXMgSVJRIHN0b3JtIChmZWVkYmFjayBsb29wKS4gQm90aAphcmUg Y29tcGxlbWVudGFyeTsgcGF0Y2ggMSBhbHJlYWR5IGluIHRoaXMgdHJlZTsgcGF0Y2ggMiBpcyBz dGlsbAptaXNzaW5nLgoKIyMjIFN0ZXAgNC41OiBTdGFibGUgTGlzdCBIaXN0b3J5CioqUmVjb3Jk OioqIE5vdCBzZWFyY2hlZCBvbiBsb3JlIHN0YWJsZSBsaXN0OyBubyBzdGFibGUgbm9taW5hdGlv biBmb3VuZAppbiBwYXRjaCB0aHJlYWQuIEFic2VuY2UgaXMgbm90IGEgbmVnYXRpdmUgc2lnbmFs IHBlciBpbnN0cnVjdGlvbnMuCgotLS0KCiMjIFBIQVNFIDU6IENPREUgU0VNQU5USUMgQU5BTFlT SVMKCiMjIyBTdGVwIDUuMTogS2V5IEZ1bmN0aW9ucwoqKlJlY29yZDoqKiBgc3ZjX2kzY19tYXN0 ZXJfaWJpX2lzcigpYCAobW9kaWZpZWQpLApgc3ZjX2kzY19tYXN0ZXJfaXJxX2hhbmRsZXIoKWAg KGNhbGxlciwgdW5tb2RpZmllZCkuCgojIyMgU3RlcCA1LjI6IENhbGxlcnMKKipSZWNvcmQ6KioK LSBgc3ZjX2kzY19tYXN0ZXJfaXJxX2hhbmRsZXIoKWAg4oaSIGBzdmNfaTNjX21hc3Rlcl9pYmlf aXNyKClgIChsaW5lIDY0NikKLSBJUlEgcmVnaXN0ZXJlZCB2aWEgYGRldm1fcmVxdWVzdF9pcnEo KWAgYXQgbGluZSAxOTQ0Ci0gKipDb250ZXh0OioqIEhhcmQgSVJRIGNvbnRleHQgb24gSTNDIFNM VlNUQVJUIGludGVycnVwdCDigJQgaG90IHBhdGggZm9yCiAgYWxsIElCSSBldmVudHMgb24gTlBD TTg0NS4KCiMjIyBTdGVwIDUuMzogQ2FsbGVlcwoqKlJlY29yZDoqKiBgc3ZjX2kzY19tYXN0ZXJf ZW1pdF9zdG9wKClgLCBgc3ZjX2hhc19xdWlyaygpYCwgYHdyaXRlbCgpYAp0byBoYXJkd2FyZSBN U1RBVFVTIHJlZ2lzdGVyLgoKIyMjIFN0ZXAgNS40OiBSZWFjaGFiaWxpdHkKKipSZWNvcmQ6KioK LSBUcmlnZ2VyZWQgd2hlbiBJM0MgYnVzIHRhcmdldCBob2xkcyBTREEgbG93IChoYXJkd2FyZSBm YXVsdCBvcgogIG1pc2JlaGF2aW5nIGRldmljZSkuCi0gSVJRLWRyaXZlbiwgcnVucyBvbiBldmVy eSBzcHVyaW91cyBTTFZTVEFSVCBpbiB0aGUgTVIgZmVlZGJhY2sgbG9vcC4KLSBOb3QgZGlyZWN0 bHkgdXNlcnNwYWNlLXRyaWdnZXJhYmxlLCBidXQgYnVzIGZhdWx0cyBvbiBCTUMvc2VydmVyCiAg cGxhdGZvcm1zIGFyZSByZWFsaXN0aWMgcHJvZHVjdGlvbiBzY2VuYXJpb3MuCi0gKipJbXBhY3Qg d2hlbiB0cmlnZ2VyZWQ6KiogQ29udGludW91cyBJUlEgcHJvY2Vzc2luZyDihpIgQ1BVIGxvY2t1 cC4KCiMjIyBTdGVwIDUuNTogU2ltaWxhciBQYXR0ZXJucwoqKlJlY29yZDoqKiBUb3AtbGV2ZWwg SVJRIGhhbmRsZXIgYWxyZWFkeSBjbGVhcnMgU0xWU1RBUlQgYW5kIGhhcyBxdWlyawpndWFyZC4g SUJJIGFuZCBIT1RfSk9JTiBjYXNlcyBhbHNvIGVtaXQgU1RPUCBidXQgZG8gbm90IG5lZWQgdGhp cyBleHRyYQpjbGVhciAoY29tbWl0IGV4cGxhaW5zIE1SLXNwZWNpZmljIGxvb3ApLiBTYW1lCmB3 cml0ZWwoU1ZDX0kzQ19NSU5UX1NMVlNUQVJULCAuLi4pYCBpZGlvbSB1c2VkIGVsc2V3aGVyZSBp biBmaWxlLgoKLS0tCgojIyBQSEFTRSA2OiBDUk9TUy1SRUZFUkVOQ0lORyBBR0FJTlNUIExPQ0FM IFRSRUUKCiMjIyBTdGVwIDYuMTogQnVnZ3kgQ29kZSBFeGlzdHM/CioqUmVjb3JkOioqICoqWUVT LioqIEN1cnJlbnQgdHJlZSBhdCBsaW5lcyA2MDnigJM2MTE6CgpgYGA2MDk6NjExOmRyaXZlcnMv aTNjL21hc3Rlci9zdmMtaTNjLW1hc3Rlci5jCiAgICAgICAgY2FzZSBTVkNfSTNDX01TVEFUVVNf SUJJVFlQRV9NQVNURVJfUkVRVUVTVDoKICAgICAgICAgICAgICAgIHN2Y19pM2NfbWFzdGVyX2Vt aXRfc3RvcChtYXN0ZXIpOwogICAgICAgICAgICAgICAgYnJlYWs7CmBgYAoKTm8gU0xWU1RBUlQg Y2xlYXIgYWZ0ZXIgU1RPUC4gYFNWQ19JM0NfUVVJUktfRkFMU0VfU0xWU1RBUlRgIGFuZApgbnBj bTg0NV9kcnZkYXRhYCBhcmUgcHJlc2VudCAobGluZXMgMTU0LCAyMDU24oCTMjA1OSkuIFByZXJl cXVpc2l0ZSBwYXRjaApgNDY2YzdmODdkZTUyZGAgaXMgcHJlc2VudC4gVXBzdHJlYW0gZml4IGAx ZWZmYTNhZGZlNTNjYCBpcyAqKm5vdCoqIGluCnRoaXMgdHJlZS4KCiMjIyBTdGVwIDYuMjogQmFj a3BvcnQgQ29tcGxpY2F0aW9ucwoqKlJlY29yZDoqKiAqKkNsZWFuIGFwcGx5Kiog4oCUIGBnaXQg YXBwbHkgLS1jaGVja2AgYWdhaW5zdCB1cHN0cmVhbSBkaWZmCnN1Y2NlZWRlZCB3aXRoIG5vIGNv bmZsaWN0cy4gTm8gcmV3b3JrIG5lZWRlZC4KCiMjIyBTdGVwIDYuMzogUmVsYXRlZCBGaXhlcyBB bHJlYWR5IFByZXNlbnQ/CioqUmVjb3JkOioqIFBhdGNoIDEvMiAoYDQ2NmM3Zjg3ZGU1MmRgKSBw cmVzZW50LiBJUlEgc3Rvcm0gZml4CihgMWVmZmEzYWRmZTUzY2ApIGFic2VudC4gTm8gYWx0ZXJu YXRlIGZpeCBmb3IgdGhpcyBpc3N1ZSBmb3VuZC4KCi0tLQoKIyMgUEhBU0UgNzogU1VCU1lTVEVN IEFORCBNQUlOVEFJTkVSIENPTlRFWFQKCiMjIyBTdGVwIDcuMTogU3Vic3lzdGVtIENyaXRpY2Fs aXR5CioqUmVjb3JkOioqICoqU3Vic3lzdGVtOioqIGBkcml2ZXJzL2kzYy9tYXN0ZXIvYCDigJQg STNDIGJ1cyBtYXN0ZXIgZHJpdmVyCihTaWx2YWNvL1ZheWF2eWEgTGFicyBTVkMgSVAsIE51dm90 b24gTlBDTTg0NSkuICoqQ3JpdGljYWxpdHk6KioKSU1QT1JUQU5UL1BFUklQSEVSQUwg4oCUIGFm ZmVjdHMgTlBDTTg0NSBCTUMgcGxhdGZvcm1zIHNwZWNpZmljYWxseSwgYnV0CklSUSBzdG9ybSBp cyBhIHN5c3RlbS13aWRlIENQVSBsb2NrdXAuCgojIyMgU3RlcCA3LjI6IFN1YnN5c3RlbSBBY3Rp dml0eQoqKlJlY29yZDoqKiBJM0Mgc3Vic3lzdGVtIGFjdGl2ZWx5IG1haW50YWluZWQgaW4gNi4x OC55IHdpdGggcmVjZW50IHN2YwphbmQgbWlwaS1pM2MtaGNpIGZpeGVzLiBOUENNODQ1IHN1cHBv cnQgYW5kIHF1aXJrIGluZnJhc3RydWN0dXJlIGFyZQplc3RhYmxpc2hlZCBpbiB0aGlzIHRyZWUu CgotLS0KCiMjIFBIQVNFIDg6IElNUEFDVCBBTkQgUklTSyBBU1NFU1NNRU5UCgojIyMgU3RlcCA4 LjE6IFdobyBJcyBBZmZlY3RlZAoqKlJlY29yZDoqKiBVc2VycyBvZiBOdXZvdG9uIE5QQ004NDUg STNDIGNvbnRyb2xsZXIKKGAibnV2b3RvbixucGNtODQ1LWkzYyJgIERUIGNvbXBhdGlibGUpLiBQ cmltYXJpbHkgZW1iZWRkZWQgQk1DL3NlcnZlcgpwbGF0Zm9ybXMuIENvbmZpZy1zcGVjaWZpYyAo ZHJpdmVyICsgaGFyZHdhcmUgcHJlc2VudCkuCgojIyMgU3RlcCA4LjI6IFRyaWdnZXIgQ29uZGl0 aW9ucwoqKlJlY29yZDoqKiBJM0MgdGFyZ2V0IHN0dWNrIGhvbGRpbmcgU0RBIGxvdyDihpIgZmFs c2UgTVIgSUJJIOKGkiBTVE9QCnJlY292ZXJ5IGxvb3AuIFJlcXVpcmVzIGJ1cyBmYXVsdCBvciBt aXNiZWhhdmluZyBkZXZpY2Ug4oCUIHVuY29tbW9uIGJ1dApyZWFsaXN0aWMuIE5vdCB1bnByaXZp bGVnZWQtdXNlcnNwYWNlLWRpcmVjdCwgYnV0IGNhbiBmcmVlemUgdGhlIHN5c3RlbQp3aGVuIGl0 IG9jY3Vycy4KCiMjIyBTdGVwIDguMzogRmFpbHVyZSBNb2RlIFNldmVyaXR5CioqUmVjb3JkOioq ICoqSVJRIHN0b3JtIOKGkiBDUFUgbG9ja3VwLioqIFNldmVyaXR5OiAqKkNSSVRJQ0FMKiogKHN5 c3RlbQpiZWNvbWVzIHVucmVzcG9uc2l2ZSkuCgojIyMgU3RlcCA4LjQ6IFJpc2stQmVuZWZpdAoq KlJlY29yZDoqKgotICoqQmVuZWZpdDoqKiBISUdIIGZvciBOUENNODQ1IHVzZXJzIOKAlCBwcmV2 ZW50cyBzeXN0ZW0gbG9ja3VwIG9uIGJ1cwogIGZhdWx0LgotICoqUmlzazoqKiBWRVJZIExPVyDi gJQgOSBsaW5lcywgcXVpcmstZ2F0ZWQsIHNhbWUgcmVnaXN0ZXIgd3JpdGUgcGF0dGVybgogIGFz IGV4aXN0aW5nIGNvZGUsIHplcm8gaW1wYWN0IG9uIG5vbi1OUENNODQ1IHBsYXRmb3Jtcy4KLSAq KlJhdGlvOioqIFN0cm9uZ2x5IGZhdm9ycyBiYWNrcG9ydC4KCi0tLQoKIyMgUEhBU0UgOTogRklO QUwgU1lOVEhFU0lTCgojIyMgU3RlcCA5LjE6IEV2aWRlbmNlIFN1bW1hcnkKCioqRk9SIGJhY2tw b3J0aW5nOioqCi0gRml4ZXMgcmVhbCBJUlEgc3Rvcm0gY2F1c2luZyBDUFUgbG9ja3VwIChDUklU SUNBTCBzZXZlcml0eSkKLSBTbWFsbCwgc3VyZ2ljYWwsIHF1aXJrLWdhdGVkIGhhcmR3YXJlIHdv cmthcm91bmQKLSBSZXZpZXdlZCBieSBOWFAgcmV2aWV3ZXI7IGFwcGxpZWQgYnkgSTNDIG1haW50 YWluZXIKLSBQcmVyZXF1aXNpdGVzIHByZXNlbnQgaW4gNi4xOC40MyB0cmVlOyBhcHBsaWVzIGNs ZWFubHkKLSBDb21wbGVtZW50cyBhbHJlYWR5LWJhY2twb3J0ZWQgcGF0Y2ggMS8yIGluIHRoZSBz ZXJpZXMKLSBNYXRjaGVzIHN0YWJsZSBleGNlcHRpb24gY2F0ZWdvcnk6IGhhcmR3YXJlIHF1aXJr L3dvcmthcm91bmQKCioqQUdBSU5TVCBiYWNrcG9ydGluZzoqKgotIE5QQ004NDUtc3BlY2lmaWMg KGxpbWl0ZWQgYXVkaWVuY2UpIOKAlCBidXQgc3RhYmxlIHJvdXRpbmVseSB0YWtlcwogIGhhcmR3 YXJlIHF1aXJrIGZpeGVzCi0gUmVxdWlyZXMgYnVzIGZhdWx0IHRvIHRyaWdnZXIg4oCUIGJ1dCBj b25zZXF1ZW5jZSBpcyBzeXN0ZW0gbG9ja3VwCi0gTm8gc3l6Ym90L3VzZXIgYnVnIHJlcG9ydCDi gJQgYnV0IGhhcmR3YXJlIHF1aXJrIGZyb20gc2lsaWNvbiB2ZW5kb3IgaXMKICBjcmVkaWJsZQoK KipVbnJlc29sdmVkOioqIE5vbmUgYWZmZWN0aW5nIHRoZSBkZWNpc2lvbi4KCiMjIyBTdGVwIDku MjogU3RhYmxlIFJ1bGVzIENoZWNrbGlzdAoxLiBPYnZpb3VzbHkgY29ycmVjdCBhbmQgdGVzdGVk PyAqKlBBU1MqKiDigJQgbWluaW1hbCByZWdpc3RlciBjbGVhciwKICAgcmV2aWV3ZWQsIG1haW50 YWluZXItYXBwbGllZAoyLiBGaXhlcyBhIHJlYWwgYnVnPyAqKlBBU1MqKiDigJQgSVJRIHN0b3Jt IG9uIE5QQ004NDUKMy4gSW1wb3J0YW50IGlzc3VlPyAqKlBBU1MqKiDigJQgQ1BVIGxvY2t1cCAo Q1JJVElDQUwpCjQuIFNtYWxsIGFuZCBjb250YWluZWQ/ICoqUEFTUyoqIOKAlCA5IGxpbmVzLCBv bmUgY2FzZSBicmFuY2gKNS4gTm8gbmV3IGZlYXR1cmVzL0FQSXM/ICoqUEFTUyoqIOKAlCBxdWly ayB3b3JrYXJvdW5kIG9ubHkKNi4gQ2FuIGFwcGx5IHRvIGxvY2FsIHRyZWU/ICoqUEFTUyoqIOKA lCBjbGVhbiBhcHBseSwgcHJlcmVxdWlzaXRlcwogICBwcmVzZW50CgojIyMgU3RlcCA5LjM6IEV4 Y2VwdGlvbiBDYXRlZ29yeQoqKlJlY29yZDoqKiBIYXJkd2FyZSBxdWlyay93b3JrYXJvdW5kIGZv ciBOUENNODQ1IEkzQyBjb250cm9sbGVyLgoKIyMjIFN0ZXAgOS40OiBEZWNpc2lvbiBSYXRpb25h bGUKVGhpcyBjb21taXQgY2xvc2VzIGEgZ2FwIGluIHRoZSBleGlzdGluZyBgU1ZDX0kzQ19RVUlS S19GQUxTRV9TTFZTVEFSVGAKaGFuZGxpbmcuIFRoZSA2LjE4LjQzIHRyZWUgYWxyZWFkeSBoYXMg TlBDTTg0NSBzdXBwb3J0LCB0aGUgcXVpcmsgZmxhZywKYW5kIHNlcmllcyBwYXRjaCAxLzIsIGJ1 dCBsYWNrcyB0aGlzIElSUSBzdG9ybSBmaXguIFdoZW4gYW4gSTNDIGJ1cwpmYXVsdCBjYXVzZXMg YSB0YXJnZXQgdG8gaG9sZCBTREEgbG93LCB0aGUgZHJpdmVyIGNhbiBlbnRlciBhbiBpbmZpbml0 ZQpJUlEgbG9vcCB0aGF0IGxvY2tzIHRoZSBDUFUuIFRoZSBmaXggaXMgbWluaW1hbCwgcXVpcmst Z2F0ZWQsIHJldmlld2VkLAphbmQgYXBwbGllcyBjbGVhbmx5LiBUaGlzIGlzIGFwcHJvcHJpYXRl IHN0YWJsZSBtYXRlcmlhbC4KCi0tLQoKIyMgVmVyaWZpY2F0aW9uCgotIFtQaGFzZSAxXSBQYXJz ZWQgc3ViamVjdCwgdGFncywgYm9keSBmcm9tIHByb3ZpZGVkIGNvbW1pdCBtZXNzYWdlCi0gW1Bo YXNlIDFdIElkZW50aWZpZWQgYXMgZXhwbGljaXQgaGFyZHdhcmUgcXVpcmsgSVJRIHN0b3JtIGZp eCwgbm90CiAgaGlkZGVuIGNsZWFudXAKLSBbUGhhc2UgMl0gRGlmZjogKzkgbGluZXMgaW4gYHN2 Y19pM2NfbWFzdGVyX2liaV9pc3IoKWAsIE1BU1RFUl9SRVFVRVNUCiAgY2FzZSBvbmx5Ci0gW1Bo YXNlIDJdIFZlcmlmaWVkIGB3cml0ZWwoU1ZDX0kzQ19NSU5UX1NMVlNUQVJULCAuLi4pYCBwYXR0 ZXJuCiAgbWF0Y2hlcyBsaW5lIDYyNiBpbiBzYW1lIGZpbGUKLSBbUGhhc2UgM10gYGdpdCBkZXNj cmliZSBIRUFEYCAvIGBtYWtlIGtlcm5lbHZlcnNpb25gOiA2LjE4LjQzCi0gW1BoYXNlIDNdIGBn aXQgYmxhbWUgLUwgNjA5LDYxMWA6IE1SIFNUT1AgcGF0aCBwcmVzZW50IHdpdGhvdXQKICBTTFZT VEFSVCBjbGVhcgotIFtQaGFzZSAzXSBgZ2l0IG1lcmdlLWJhc2UgLS1pcy1hbmNlc3RvciA0NjZj N2Y4N2RlNTJkIEhFQURgOiBwYXRjaCAxLzIKICBwcmVzZW50Ci0gW1BoYXNlIDNdIGBnaXQgbWVy Z2UtYmFzZSAtLWlzLWFuY2VzdG9yIDFlZmZhM2FkZmU1M2MgSEVBRGA6IElSUSBzdG9ybQogIGZp eCBOT1QgcHJlc2VudAotIFtQaGFzZSAzXSBgZ2l0IGxvZyAtLW9uZWxpbmUgNGRkMTJlOTQ0ZjA3 Xi4uSEVBRCAtLQogIGRyaXZlcnMvaTNjL21hc3Rlci9zdmMtaTNjLW1hc3Rlci5jYDogcmVsYXRl ZCBoaXN0b3J5IGNvbmZpcm1lZAotIFtQaGFzZSAzXSBgZ2l0IGFwcGx5IC0tY2hlY2tgIG9uIHVw c3RyZWFtIGRpZmY6IGFwcGxpZXMgY2xlYW5seQotIFtQaGFzZSA0XSBgYjQgZGlnIC1jIDFlZmZh M2FkZmU1M2MgLWFgOiB2MSAyLzIgc2VyaWVzIGZvdW5kCi0gW1BoYXNlIDRdIGBiNCBkaWcgLWMg MWVmZmEzYWRmZTUzYyAtd2A6IG1haW50YWluZXJzIENDJ2QsIEZyYW5rIExpCiAgcmV2aWV3ZWQK LSBbUGhhc2UgNF0gYGI0IGRpZyAtYyAxZWZmYTNhZGZlNTNjIC1tIC90bXAvaTNjX2lycV9zdG9y bS5tYm94YDoKICBCZWxsb25pIGFwcGxpZWQgYm90aCBwYXRjaGVzOyBubyBzdGFibGUgdGFnLCBu byBOQUtzCi0gW1BoYXNlIDVdIGBncmVwIHN2Y19pM2NfbWFzdGVyX2lycV9oYW5kbGVyYDogY2Fs bGVyIGF0IGxpbmUgNjQ2OyBJUlEKICByZWdpc3RlcmVkIGF0IGxpbmUgMTk0NAotIFtQaGFzZSA1 XSBgZ3JlcCBTVkNfSTNDX1FVSVJLX0ZBTFNFX1NMVlNUQVJUYDogcXVpcmsgZGVmaW5lZCBsaW5l IDE1NCwKICB1c2VkIGxpbmVzIDYyOCBhbmQgMjA1OAotIFtQaGFzZSA2XSBgZ3JlcCBucGNtODQ1 YDogYG5wY204NDVfZHJ2ZGF0YWAgd2l0aCBxdWlyayBhdCBsaW5lcwogIDIwNTbigJMyMDY1Ci0g W1BoYXNlIDZdIFJlYWQgY3VycmVudCBmaWxlIGxpbmVzIDYwOeKAkzYxMSwgNjE34oCTNjQ4OiBi dWdneSBjb2RlCiAgY29uZmlybWVkLCBwcmVyZXF1aXNpdGUgcXVpcmsgZ3VhcmQgcHJlc2VudAot IFtQaGFzZSA3XSBgZ2l0IGxvZyAtLW9uZWxpbmUgLTIwIC0tIGRyaXZlcnMvaTNjL2A6IGFjdGl2 ZSBzdWJzeXN0ZW0KLSBbUGhhc2UgOF0gRmFpbHVyZSBtb2RlIElSUSBzdG9ybSDihpIgQ1BVIGxv Y2t1cCBhc3Nlc3NlZCBhcyBDUklUSUNBTAoKKipZRVMqKlRoZSBiYWNrZ3JvdW5kIGNoZWNrIGZp bmlzaGVkOiB0aGUgSVJRIHN0b3JtIGZpeCAoYDFlZmZhM2FkZmU1M2NgCi8gYDVlMzNiOGMxOWU1 YjJgKSBpcyAqKm5vdCoqIGluIHlvdXIgY3VycmVudCAqKjYuMTguNDMqKiB0cmVlLgoKVGhhdCBt YXRjaGVzIHRoZSBlYXJsaWVyIGFuYWx5c2lzOiBOUENNODQ1IHN1cHBvcnQgYW5kIHRoZSByZWxh dGVkCmZhbHNlLVNMVlNUQVJUIHF1aXJrIGFyZSBwcmVzZW50LCBwYXRjaCAxLzIgKGA0NjZjN2Y4 N2RlNTJkYCkgaXMgYWxyZWFkeQphcHBsaWVkLCBidXQgdGhlIE1SLWhhbmRsZXIgU0xWU1RBUlQg Y2xlYXIgaXMgc3RpbGwgbWlzc2luZyDigJQgYW5kIHRoZQp1cHN0cmVhbSBwYXRjaCBhcHBsaWVz IGNsZWFubHkuCgoqKkJhY2twb3J0IHJlY29tbWVuZGF0aW9uOiBZRVMqKiDigJQgaXTigJlzIGEg c21hbGwsIHF1aXJrLWdhdGVkIGZpeCBmb3IgYW4KSVJRIHN0b3JtIHRoYXQgY2FuIGxvY2sgdXAg dGhlIENQVSBvbiBOUENNODQ1IHdoZW4gdGhlIEkzQyBidXMgZ2V0cwpzdHVjay4KCiBkcml2ZXJz L2kzYy9tYXN0ZXIvc3ZjLWkzYy1tYXN0ZXIuYyB8IDkgKysrKysrKysrCiAxIGZpbGUgY2hhbmdl ZCwgOSBpbnNlcnRpb25zKCspCgpkaWZmIC0tZ2l0IGEvZHJpdmVycy9pM2MvbWFzdGVyL3N2Yy1p M2MtbWFzdGVyLmMgYi9kcml2ZXJzL2kzYy9tYXN0ZXIvc3ZjLWkzYy1tYXN0ZXIuYwppbmRleCBk MzNmNGM3NjU0OTc0Li43MDM2NWE1NTBhZDI5IDEwMDY0NAotLS0gYS9kcml2ZXJzL2kzYy9tYXN0 ZXIvc3ZjLWkzYy1tYXN0ZXIuYworKysgYi9kcml2ZXJzL2kzYy9tYXN0ZXIvc3ZjLWkzYy1tYXN0 ZXIuYwpAQCAtNjA4LDYgKzYwOCwxNSBAQCBzdGF0aWMgdm9pZCBzdmNfaTNjX21hc3Rlcl9pYmlf aXNyKHN0cnVjdCBzdmNfaTNjX21hc3RlciAqbWFzdGVyKQogCQlicmVhazsKIAljYXNlIFNWQ19J M0NfTVNUQVRVU19JQklUWVBFX01BU1RFUl9SRVFVRVNUOgogCQlzdmNfaTNjX21hc3Rlcl9lbWl0 X3N0b3AobWFzdGVyKTsKKworCQkvKgorCQkgKiBJZiBhIHRhcmdldCBnZXRzIHN0dWNrIGhvbGRp bmcgU0RBIGxvdywgdGhlIGNvbnRyb2xsZXIgcmVwb3J0cyBhIE1SLgorCQkgKiBPbiBOUENNODQ1 LCBlbWl0dGluZyBTVE9QIG1heSBzcHVyaW91c2x5IHNldCBTTFZTVEFSVCwgcmV0cmlnZ2VyaW5n CisJCSAqIHRoZSBpbnRlcnJ1cHQgYW5kIHJlLWVudGVyaW5nIE1SIGhhbmRsaW5nLCBsZWFkaW5n IHRvIGFuIElSUSBzdG9ybS4KKwkJICogQ2xlYXIgU0xWU1RBUlQgYWZ0ZXIgU1RPUCB0byBicmVh ayB0aGUgbG9vcC4KKwkJICovCisJCWlmIChzdmNfaGFzX3F1aXJrKG1hc3RlciwgU1ZDX0kzQ19R VUlSS19GQUxTRV9TTFZTVEFSVCkpCisJCQl3cml0ZWwoU1ZDX0kzQ19NSU5UX1NMVlNUQVJULCBt YXN0ZXItPnJlZ3MgKyBTVkNfSTNDX01TVEFUVVMpOwogCQlicmVhazsKIAlkZWZhdWx0OgogCQli cmVhazsKLS0gCjIuNTMuMAoKCi0tIApsaW51eC1pM2MgbWFpbGluZyBsaXN0CmxpbnV4LWkzY0Bs aXN0cy5pbmZyYWRlYWQub3JnCmh0dHA6Ly9saXN0cy5pbmZyYWRlYWQub3JnL21haWxtYW4vbGlz dGluZm8vbGludXgtaTNjCg==