From: Sreeshankar K <sreeshankar0910@gmail.com>
To: andersson@kernel.org, sboyd@kernel.org, bmasney+clk@redhat.com,
jbrunet+clk@baylibre.com, robh@kernel.org, krzk+dt@kernel.org,
conor+dt@kernel.org, rafael@kernel.org, viresh.kumar@linaro.org,
konradybcio@kernel.org, tglx@kernel.org, ulfh@kernel.org
Cc: radu@rendec.net, abel.vesa@oss.qualcomm.com,
taniya.das@oss.qualcomm.com, danila@mainlining.org,
davidwronek@gmail.com, mani@kernel.org, robimarko@gmail.com,
linux@gurudas.dev, linux-arm-msm@vger.kernel.org,
linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org,
Sreeshankar K <sreeshankar0910@gmail.com>
Subject: [PATCH v9 00/12] Add initial support for Qualcomm SM7250 SoC
Date: Tue, 1 Sep 2026 09:24:35 +0000 [thread overview]
Message-ID: <20260901092447.3028-1-sreeshankar0910@gmail.com> (raw)
This patchset introduces foundational upstream support for the Qualcomm SM7250
SoC (internally codenamed Lito).
SM7250 is an ARMv8.2-A platform manufactured on a 7nm process, featuring an
octa-core Kryo 475 CPU configuration (1x Prime Cortex-A76, 1x Gold Cortex-A76,
and 6x Silver Cortex-A55) and Adreno 620 GPU.
This patchset is organized as follows:
> Document relevant device tree bindings (SoC ID, Kryo 475 CPUs, SCM, PDC,
RPMh clocks/power domains, GCC and cpufreq hardware).
> Add driver support for SM7250 in socinfo, rpmh-clk, rpmhpd, and GCC.
> Add the base SoC DTSI (sm7250.dtsi) defining the cpus, PSCI,
interrupt controllers, clock providers, power domains, and reserved memory.
Dependencies:
This patchset depends on the following patch:
> [PATCH] dt-bindings: clock: qcom,sm6375-gcc: Merge SM7150 into SM6375
Link: https://lore.kernel.org/linux-arm-msm/20260817082457.64797-2-krzysztof.kozlowski@oss.qualcomm.com/T/#t
Changelog [v9]:
> [PATCH v9 04/13]: clk: qcom: Add Global Clock Controller (GCC) driver for SM7250
Make all clk_init_data instances const across the driver.
Link [v8]: https://lore.kernel.org/linux-arm-msm/20260901070717.20513-1-sreeshankar0910@gmail.com/T/#t
Changelog [v8]:
Same as v7. Resending the full patchset as v8 due to a transmission interruption during v7.
Link [v7]: https://lore.kernel.org/linux-arm-msm/20260901064357.20055-1-sreeshankar0910@gmail.com/T/#t
Changelog [v7]:
[PATCH v7 04/13]: clk: qcom: Add Global Clock Controller (GCC) driver for SM7250
> Fixed missing (struct device *dev) in gcc_sm7250_clk_regs_configure
Link: https://lore.kernel.org/linux-arm-msm/apYNXZ9TJEC6rVVf@baldur
Drop applied patches
1) [09/13] dt-bindings: arm: cpus: Document Kryo 475 CPUs (commit: 1c8fe8863780705aba77893fade65f728e82b67a)
Link: https://lore.kernel.org/linux-arm-msm/178822856275.1835959.3848131517961346933.b4-ty@kernel.org
Link [v6]: https://lore.kernel.org/linux-arm-msm/20260824150156.1310-1-sreeshankar0910@gmail.com/T/#t
Changelog [v6]:
[PATCH v6 04/13]: clk: qcom: Add Global Clock Controller (GCC) driver for SM7250
> Make all clk_init_data instances const across the driver.
Link [v5]: https://lore.kernel.org/linux-arm-msm/20260824130437.2771-1-sreeshankar0910@gmail.com/T/#t
Changelog [v5]:
[PATCH v5 13/13]: arm64: dts: qcom: Add SM7250 devicetree file
> Reformat multi-entry phandle lists (domain-idle-states) to '<&a>, <&b>'.
> Reformat multi-entry tuples and string lists (qcom,pdc-ranges, qcom,tcs-config, reg-names)
to one item per line.
> Enable QUPv3 wrapper globally by dropping 'status = "disabled"'.
> Move compatible property to first.
> Remove clock-frequency property for timer.
Link [v4]: https://lore.kernel.org/linux-arm-msm/20260821154030.2514-1-sreeshankar0910@gmail.com/T/#t
Changelog [v4]:
[PATCH v4 04/13] clk: qcom: Add Global Clock Controller (GCC) driver for SM7250
> Update .fw_name with .index
[PATCH v4 13/13] arm64: dts: qcom: Add SM7250 devicetree file
> Added missing capacity-dmips-mhz and dynamic-power-coefficient for cpu@300
> Added power-domains for cpus and apps_rsc
Link [v3]: https://lore.kernel.org/linux-arm-msm/20260821081125.4522-1-sreeshankar0910@gmail.com/T/#t
Changelog [v3]:
[PATCH v3 04/13] clk: qcom: Add Global Clock Controller (GCC) driver for SM7250
> Updated the way of registering critical clocks.
> Made some more clock critical.
GCC_VIDEO_XO_CLK
GCC_CAMERA_XO_CLK
GCC_DISP_XO_CLK
GCC_NPU_CFG_AHB_CLK
GCC_CPUSS_AHB_CLK
GCC_NPU_BWMON_CFG_AHB_CLK
These clocks are flagged as critical in gcc-lito.c
Link [v2]: https://lore.kernel.org/linux-arm-msm/20260819152545.3934-1-sreeshankar0910@gmail.com/T/#t
Changelog [v2]:
[PATCH v2 12/13] dt-bindings: cpufreq: qcom-hw: Document SM7250 cpufreq hardware
[PATCH v2 13/13] arm64: dts: qcom: Add SM7250 devicetree file
> Added SM7250 cpufreq hardware
Link [v1]: https://lore.kernel.org/linux-arm-msm/20260818080754.4362-1-sreeshankar0910@gmail.com/T/#t
Sreeshankar K (12):
dt-bindings: arm: qcom,ids: Add SoC ID for SM7250
soc: qcom: socinfo: Add SM7250 SoC ID
dt-bindings: clock: Add SM7250 global clock controller
clk: qcom: Add Global Clock Controller (GCC) driver for SM7250
dt-bindings: clock: qcom,rpmhcc: Document RPMHCC compatible for SM7250
clk: qcom: rpmh: Add SM7250 rpmh clocks
dt-bindings: power: qcom,rpmhpd: Document RPMh power domain for SM7250
pmdomain: qcom: rpmhpd: Add RPMh power domains for SM7250
dt-bindings: firmware: qcom,scm: Document SM7250 SCM
dt-bindings: interrupt-controller: qcom,pdc: Document SM7250 PDC
dt-bindings: cpufreq: qcom-hw: Document SM7250 cpufreq hardware
arm64: dts: qcom: Add SM7250 devicetree file
.../bindings/clock/qcom,rpmhcc.yaml | 1 +
.../bindings/clock/qcom,sm6375-gcc.yaml | 4 +-
.../bindings/cpufreq/cpufreq-qcom-hw.yaml | 1 +
.../bindings/firmware/qcom,scm.yaml | 1 +
.../interrupt-controller/qcom,pdc.yaml | 1 +
.../devicetree/bindings/power/qcom,rpmpd.yaml | 1 +
arch/arm64/boot/dts/qcom/sm7250.dtsi | 771 ++++++
drivers/clk/qcom/Kconfig | 9 +
drivers/clk/qcom/Makefile | 1 +
drivers/clk/qcom/clk-rpmh.c | 24 +
drivers/clk/qcom/gcc-sm7250.c | 2275 +++++++++++++++++
drivers/pmdomain/qcom/rpmhpd.c | 19 +
drivers/soc/qcom/socinfo.c | 1 +
include/dt-bindings/arm/qcom,ids.h | 1 +
include/dt-bindings/clock/qcom,sm7250-gcc.h | 163 ++
15 files changed, 3272 insertions(+), 1 deletion(-)
create mode 100644 arch/arm64/boot/dts/qcom/sm7250.dtsi
create mode 100644 drivers/clk/qcom/gcc-sm7250.c
create mode 100644 include/dt-bindings/clock/qcom,sm7250-gcc.h
--
2.43.0
next reply other threads:[~2026-09-01 9:25 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-01 9:24 Sreeshankar K [this message]
2026-09-01 9:24 ` [PATCH v9 01/12] dt-bindings: arm: qcom,ids: Add SoC ID for SM7250 Sreeshankar K
2026-09-01 9:24 ` [PATCH v9 02/12] soc: qcom: socinfo: Add SM7250 SoC ID Sreeshankar K
2026-09-01 9:24 ` [PATCH v9 03/12] dt-bindings: clock: Add SM7250 global clock controller Sreeshankar K
2026-09-01 9:24 ` [PATCH v9 04/12] clk: qcom: Add Global Clock Controller (GCC) driver for SM7250 Sreeshankar K
2026-09-02 9:30 ` Taniya Das
2026-09-02 13:41 ` Sreeshankar K
2026-09-01 9:24 ` [PATCH v9 05/12] dt-bindings: clock: qcom,rpmhcc: Document RPMHCC compatible " Sreeshankar K
2026-09-01 9:24 ` [PATCH v9 06/12] clk: qcom: rpmh: Add SM7250 rpmh clocks Sreeshankar K
2026-09-01 9:24 ` [PATCH v9 07/12] dt-bindings: power: qcom,rpmhpd: Document RPMh power domain for SM7250 Sreeshankar K
2026-09-01 9:24 ` [PATCH v9 08/12] pmdomain: qcom: rpmhpd: Add RPMh power domains " Sreeshankar K
2026-09-01 9:24 ` [PATCH v9 09/12] dt-bindings: firmware: qcom,scm: Document SM7250 SCM Sreeshankar K
2026-09-01 9:24 ` [PATCH v9 10/12] dt-bindings: interrupt-controller: qcom,pdc: Document SM7250 PDC Sreeshankar K
2026-09-01 9:24 ` [PATCH v9 11/12] dt-bindings: cpufreq: qcom-hw: Document SM7250 cpufreq hardware Sreeshankar K
2026-09-01 9:24 ` [PATCH v9 12/12] arm64: dts: qcom: Add SM7250 devicetree file Sreeshankar K
2026-09-01 12:02 ` [PATCH v9 00/12] Add initial support for Qualcomm SM7250 SoC Abel Vesa
2026-09-01 12:52 ` Sreeshankar K
2026-09-01 14:21 ` Abel Vesa
2026-09-01 14:29 ` Sreeshankar K
2026-09-01 14:31 ` Sreeshankar K
2026-09-01 15:46 ` Ulf Hansson
2026-09-01 16:21 ` Sreeshankar K
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