From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by smtp.lore.kernel.org (Postfix) with ESMTP id 781F7C61DD3 for ; Tue, 1 Sep 2026 10:21:06 +0000 (UTC) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 9A25A40B95; Tue, 1 Sep 2026 12:19:54 +0200 (CEST) Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by mails.dpdk.org (Postfix) with ESMTP id C3CA14027E for ; Tue, 1 Sep 2026 12:19:51 +0200 (CEST) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id A7220200008; Tue, 1 Sep 2026 12:19:51 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 7185D200006; Tue, 1 Sep 2026 12:19:51 +0200 (CEST) Received: from lsv03583.swis.in-blr01.nxp.com (lsv03583.swis.in-blr01.nxp.com [92.120.146.12]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 4617418000B7; Tue, 1 Sep 2026 18:19:50 +0800 (+08) From: Hemant Agrawal To: stephen@networkplumber.org, thomas@monjalon.net, dev@dpdk.org Cc: Jun Yang Subject: [PATCH v15 16/23] net/dpaa: support fmcless rxq number as devargs Date: Tue, 1 Sep 2026 15:49:19 +0530 Message-Id: <20260901101926.1574209-17-hemant.agrawal@nxp.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20260901101926.1574209-1-hemant.agrawal@nxp.com> References: <20260820144312.3922316-1-hemant.agrawal@nxp.com> <20260901101926.1574209-1-hemant.agrawal@nxp.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Virus-Scanned: ClamAV using ClamSMTP X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Jun Yang In FMCLESS mode, set the default number of Rx frame queues to the maximum queue number instead of the core count, because multiple queues may be processed on the same core. The value can also be configured per port through the 'drv_fmcless_rxq' device argument. Signed-off-by: Jun Yang Signed-off-by: Hemant Agrawal --- doc/guides/nics/dpaa.rst | 3 +++ drivers/net/dpaa/dpaa_ethdev.c | 27 ++++++++++++++++++++++++--- 2 files changed, 27 insertions(+), 3 deletions(-) diff --git a/doc/guides/nics/dpaa.rst b/doc/guides/nics/dpaa.rst index 2b6bf7608d..d03027d8bb 100644 --- a/doc/guides/nics/dpaa.rst +++ b/doc/guides/nics/dpaa.rst @@ -286,6 +286,9 @@ the ``-a`` EAL option (e.g. ``-a dpaa_bus:fm1-mac3,drv_rx_taildrop=64``): Configure the Rx / Tx frame queue taildrop congestion threshold. A value of ``0`` disables taildrop. +``drv_fmcless_rxq`` + In FMCLESS mode, override the number of Rx frame queues to create. + FMAN Config ----------- diff --git a/drivers/net/dpaa/dpaa_ethdev.c b/drivers/net/dpaa/dpaa_ethdev.c index 24ca485015..094a18455d 100644 --- a/drivers/net/dpaa/dpaa_ethdev.c +++ b/drivers/net/dpaa/dpaa_ethdev.c @@ -57,6 +57,7 @@ #define DRIVER_RECV_ERR_PKTS "recv_err_pkts" #define DRIVER_RX_TAILDROP "drv_rx_taildrop" #define DRIVER_TX_TAILDROP "drv_tx_taildrop" +#define DRIVER_FMCLESS_RXQ "drv_fmcless_rxq" #define RTE_PRIORITY_103 103 /* Supported Rx offloads */ @@ -2387,8 +2388,27 @@ dpaa_dev_init(struct rte_eth_dev *eth_dev) dpaa_intf->name); } } else { - /* FMCLESS mode, load balance to multiple cores.*/ - num_rx_fqs = rte_lcore_count(); + /* FMCLESS mode, default queue number is max queues + * because multiple queues may be processed on same core. + */ + long fmcless_rxq = 0; + + if (dpaa_get_devargs_int(dev->devargs, DRIVER_FMCLESS_RXQ, + &fmcless_rxq) == 1) { + num_rx_fqs = (int)fmcless_rxq; + if (num_rx_fqs < 1) { + DPAA_PMD_ERR("fmcless rxq number(%d) must be >= 1", + num_rx_fqs); + return -EINVAL; + } + if (num_rx_fqs > DPAA_MAX_NUM_PCD_QUEUES) { + DPAA_PMD_WARN("fmcless max rxq number(%d) > %d", + num_rx_fqs, DPAA_MAX_NUM_PCD_QUEUES); + num_rx_fqs = DPAA_MAX_NUM_PCD_QUEUES; + } + } else { + num_rx_fqs = DPAA_MAX_NUM_PCD_QUEUES; + } } /* Each device can not have more than DPAA_MAX_NUM_PCD_QUEUES RX @@ -2871,5 +2891,6 @@ RTE_PMD_REGISTER_DPAA(net_dpaa, rte_dpaa_pmd); RTE_PMD_REGISTER_PARAM_STRING(net_dpaa, DRIVER_RECV_ERR_PKTS "= " DRIVER_RX_TAILDROP "= " - DRIVER_TX_TAILDROP "="); + DRIVER_TX_TAILDROP "= " + DRIVER_FMCLESS_RXQ "="); RTE_LOG_REGISTER_DEFAULT(dpaa_logtype_pmd, NOTICE); -- 2.25.1