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[79.26.252.140]) by smtp.googlemail.com with ESMTPSA id ffacd0b85a97d-48442d3d2eesm4644130f8f.15.2026.09.01.05.39.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Sep 2026 05:39:44 -0700 (PDT) From: Christian Marangi To: Vinod Koul , Neil Armstrong , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Christian Marangi , linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 1/3] dt-bindings: phy: airoha: Document support for AN7583 USB PHY Date: Tue, 1 Sep 2026 14:39:31 +0200 Message-ID: <20260901123933.15388-2-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260901123933.15388-1-ansuelsmth@gmail.com> References: <20260901123933.15388-1-ansuelsmth@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260901_053947_131999_274ADEAC X-CRM114-Status: GOOD ( 18.46 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org Add documentation for Airoha AN7583 USB PHY that describe the USB PHY for the USB controller. Airoha AN7583 SoC support a maximum of 2 USB port. The USB 2.0 mode is always supported. The USB 3.0 mode is optional and depends on the Serdes mode currently configured on the system for the relevant USB port. To correctly calibrate, the USB 2.0 port require correct value in "airoha,usb2-monitor-clk-sel" property. Both the 2 USB 2.0 port permit selecting one of the 4 monitor clock for calibration (internal clock not exposed to the system) but each port have only one of the 4 actually connected in HW hence the correct value needs to be specified in DT based on board and the physical port. Normally it's monitor clock 1 for USB1 and monitor clock 2 for USB2. To correctly setup the Serdes mode attached to the USB 3.0 mode, a phys property is required with the phandle pointing to the correct Serdes port provided by the SCU node. Providing the phys property is optional if USB 3.0 is not used. Signed-off-by: Christian Marangi --- .../bindings/phy/airoha,an7583-usb-phy.yaml | 133 ++++++++++++++++++ 1 file changed, 133 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/airoha,an7583-usb-phy.yaml diff --git a/Documentation/devicetree/bindings/phy/airoha,an7583-usb-phy.yaml b/Documentation/devicetree/bindings/phy/airoha,an7583-usb-phy.yaml new file mode 100644 index 000000000000..f1a5d83e8968 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/airoha,an7583-usb-phy.yaml @@ -0,0 +1,133 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/airoha,an7583-usb-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Airoha AN7583 SoC USB PHY + +maintainers: + - Christian Marangi + +description: > + The Airoha AN7583 SoC USB PHY describes the USB PHY for the USB controller.. + + Airoha AN7583 SoC support a maximum of 2 USB port. The USB 2.0 mode is + always supported. The USB 3.0 mode is optional and depends on the Serdes + mode currently configured on the system for the relevant USB port. + + On Airoha AN7583 there is an unified PHY implementation where a single + PHY provide support for both the 2 USB 2.0 port and + optionally one 3.0 USB. + +properties: + compatible: + const: airoha,an7583-usb-phy + + reg: + items: + - description: phy register + - description: ana register + - description: pma register + - description: dig register + + reg-names: + items: + - const: phy + - const: ana + - const: pma + - const: dig + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + usb3-phy: + type: object + + properties: + phys: + items: + - description: phandle to Serdes PHY + + '#phy-cells': + description: The cell contains the mode, PHY_TYPE_USB2 or PHY_TYPE_USB3, + as defined in dt-bindings/phy/phy.h. + const: 1 + + required: + - phys + - '#phy-cells' + + additionalProperties: false + +patternProperties: + '^usb2-phy@[0-9a-f]+$': + type: object + + properties: + reg: + enum: [0x0, 0x1000] + + airoha,usb2-monitor-clk-sel: + description: Describe what oscillator across the available 4 + should be selected for USB 2.0 Slew Rate calibration. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1, 2, 3] + + '#phy-cells': + description: The cell contains the mode, PHY_TYPE_USB2 or PHY_TYPE_USB3, + as defined in dt-bindings/phy/phy.h. + const: 1 + + required: + - reg + - airoha,usb2-monitor-clk-sel + - '#phy-cells' + + additionalProperties: false + +required: + - compatible + - reg + - reg-names + - '#address-cells' + - '#size-cells' + +unevaluatedProperties: false + +examples: + - | + phy@1fac0000 { + compatible = "airoha,an7583-usb-phy"; + reg = <0x1fac0000 0x1200>, + <0x1fa6f000 0x100>, + <0x1fa6e000 0x400>, + <0x1fa6a000 0x900>; + reg-names = "phy", "ana", "pma", "dig"; + + #address-cells = <1>; + #size-cells = <0>; + + usb2-phy@0 { + reg = <0x0>; + airoha,usb2-monitor-clk-sel = <0>; + + #phy-cells = <1>; + }; + + usb2-phy@1000 { + reg = <0x1000>; + airoha,usb2-monitor-clk-sel = <1>; + + #phy-cells = <1>; + }; + + usb3-phy { + phys = <&serdes_phy>; + + #phy-cells = <1>; + }; + }; -- 2.53.0 -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wm1-f46.google.com (mail-wm1-f46.google.com [209.85.128.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 224B235F5E4 for ; Tue, 1 Sep 2026 12:39:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.46 ARC-Seal:i=1; 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[79.26.252.140]) by smtp.googlemail.com with ESMTPSA id ffacd0b85a97d-48442d3d2eesm4644130f8f.15.2026.09.01.05.39.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Sep 2026 05:39:44 -0700 (PDT) From: Christian Marangi To: Vinod Koul , Neil Armstrong , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Christian Marangi , linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 1/3] dt-bindings: phy: airoha: Document support for AN7583 USB PHY Date: Tue, 1 Sep 2026 14:39:31 +0200 Message-ID: <20260901123933.15388-2-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260901123933.15388-1-ansuelsmth@gmail.com> References: <20260901123933.15388-1-ansuelsmth@gmail.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Add documentation for Airoha AN7583 USB PHY that describe the USB PHY for the USB controller. Airoha AN7583 SoC support a maximum of 2 USB port. The USB 2.0 mode is always supported. The USB 3.0 mode is optional and depends on the Serdes mode currently configured on the system for the relevant USB port. To correctly calibrate, the USB 2.0 port require correct value in "airoha,usb2-monitor-clk-sel" property. Both the 2 USB 2.0 port permit selecting one of the 4 monitor clock for calibration (internal clock not exposed to the system) but each port have only one of the 4 actually connected in HW hence the correct value needs to be specified in DT based on board and the physical port. Normally it's monitor clock 1 for USB1 and monitor clock 2 for USB2. To correctly setup the Serdes mode attached to the USB 3.0 mode, a phys property is required with the phandle pointing to the correct Serdes port provided by the SCU node. Providing the phys property is optional if USB 3.0 is not used. Signed-off-by: Christian Marangi --- .../bindings/phy/airoha,an7583-usb-phy.yaml | 133 ++++++++++++++++++ 1 file changed, 133 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/airoha,an7583-usb-phy.yaml diff --git a/Documentation/devicetree/bindings/phy/airoha,an7583-usb-phy.yaml b/Documentation/devicetree/bindings/phy/airoha,an7583-usb-phy.yaml new file mode 100644 index 000000000000..f1a5d83e8968 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/airoha,an7583-usb-phy.yaml @@ -0,0 +1,133 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/airoha,an7583-usb-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Airoha AN7583 SoC USB PHY + +maintainers: + - Christian Marangi + +description: > + The Airoha AN7583 SoC USB PHY describes the USB PHY for the USB controller.. + + Airoha AN7583 SoC support a maximum of 2 USB port. The USB 2.0 mode is + always supported. The USB 3.0 mode is optional and depends on the Serdes + mode currently configured on the system for the relevant USB port. + + On Airoha AN7583 there is an unified PHY implementation where a single + PHY provide support for both the 2 USB 2.0 port and + optionally one 3.0 USB. + +properties: + compatible: + const: airoha,an7583-usb-phy + + reg: + items: + - description: phy register + - description: ana register + - description: pma register + - description: dig register + + reg-names: + items: + - const: phy + - const: ana + - const: pma + - const: dig + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + usb3-phy: + type: object + + properties: + phys: + items: + - description: phandle to Serdes PHY + + '#phy-cells': + description: The cell contains the mode, PHY_TYPE_USB2 or PHY_TYPE_USB3, + as defined in dt-bindings/phy/phy.h. + const: 1 + + required: + - phys + - '#phy-cells' + + additionalProperties: false + +patternProperties: + '^usb2-phy@[0-9a-f]+$': + type: object + + properties: + reg: + enum: [0x0, 0x1000] + + airoha,usb2-monitor-clk-sel: + description: Describe what oscillator across the available 4 + should be selected for USB 2.0 Slew Rate calibration. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1, 2, 3] + + '#phy-cells': + description: The cell contains the mode, PHY_TYPE_USB2 or PHY_TYPE_USB3, + as defined in dt-bindings/phy/phy.h. + const: 1 + + required: + - reg + - airoha,usb2-monitor-clk-sel + - '#phy-cells' + + additionalProperties: false + +required: + - compatible + - reg + - reg-names + - '#address-cells' + - '#size-cells' + +unevaluatedProperties: false + +examples: + - | + phy@1fac0000 { + compatible = "airoha,an7583-usb-phy"; + reg = <0x1fac0000 0x1200>, + <0x1fa6f000 0x100>, + <0x1fa6e000 0x400>, + <0x1fa6a000 0x900>; + reg-names = "phy", "ana", "pma", "dig"; + + #address-cells = <1>; + #size-cells = <0>; + + usb2-phy@0 { + reg = <0x0>; + airoha,usb2-monitor-clk-sel = <0>; + + #phy-cells = <1>; + }; + + usb2-phy@1000 { + reg = <0x1000>; + airoha,usb2-monitor-clk-sel = <1>; + + #phy-cells = <1>; + }; + + usb3-phy { + phys = <&serdes_phy>; + + #phy-cells = <1>; + }; + }; -- 2.53.0