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[159.2.239.150]) by smtp.gmail.com with ESMTPSA id d75a77b69052e-52fbe7fbe06sm96855001cf.17.2026.09.01.07.32.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Sep 2026 07:32:21 -0700 (PDT) Received: from jgg by wakko with local (Exim 4.97) (envelope-from ) id 1x1PXA-0000000BhaA-3wav; Tue, 01 Sep 2026 11:32:20 -0300 Date: Tue, 1 Sep 2026 11:32:20 -0300 From: Jason Gunthorpe To: "Aneesh Kumar K.V" Cc: Nicolin Chen , linux-coco@lists.linux.dev, kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Alexey Kardashevskiy , Catalin Marinas , Dan Williams , Joerg Roedel , Jonathan Cameron , Marc Zyngier , Pranjal Shrivastava , Robin Murphy , Samuel Ortiz , Steven Price , Suzuki K Poulose , Will Deacon , Xu Yilun Subject: Re: [RFC PATCH v4 01/16] iommu/arm-smmu-v3: Discover RME support and realm IRQ topology Message-ID: <20260901143220.GB56830@ziepe.ca> References: <20260427085344.941627-1-aneesh.kumar@kernel.org> <20260427085344.941627-2-aneesh.kumar@kernel.org> Precedence: bulk X-Mailing-List: kvmarm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On Tue, Sep 01, 2026 at 02:16:10PM +0530, Aneesh Kumar K.V wrote: > +static struct irq_domain *arm_smmu_get_wired_irq_domain(struct arm_smmu_device *smmu) > +{ > + int irqs[] = { > + smmu->combined_irq, > + smmu->evtq.q.irq, > + smmu->gerr_irq, > + smmu->priq.q.irq, > + }; > + struct irq_domain *domain = NULL; > + struct irq_data *irq_data; > + unsigned int i; > + > + for (i = 0; i < ARRAY_SIZE(irqs); i++) { > + if (irqs[i] <= 0) > + continue; > + > + irq_data = irq_get_irq_data(irqs[i]); > + if (!irq_data || !irq_data->domain) > + return ERR_PTR(-EINVAL); > + > + if (domain && domain != irq_data->domain) > + return ERR_PTR(-EINVAL); > + > + domain = irq_data->domain; > + } > + > + return domain ?: ERR_PTR(-ENXIO); I'm not excited to see code like this in a driver. Please put a helper function someplace else to translate whatever the RMM value is into a normal linux irq number? But this feels wrong to me, interrupts need to come through the FW side, ACPI or DT. Having RMM pass the value outside that infrastructure is going to be painful. None of this is trusted, why is it working like this vs just adding more interrupt lines to the FW description? A naked integer is not enough to describe an interrupt in the system, and guessing that it is connected to other interrupts in the psmmu seems like an uncomfortable leap to me. Jason