From: sashiko-bot@kernel.org
To: "Tanmay Kathpalia" <tanmay.kathpalia@altera.com>
Cc: conor+dt@kernel.org, devicetree@vger.kernel.org, robh@kernel.org
Subject: Re: [PATCH v7 1/9] dt-bindings: mmc: add Cadence SD6HC binding
Date: Tue, 01 Sep 2026 19:00:37 +0000 [thread overview]
Message-ID: <20260901190038.1F16F1F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260901184828.15653-2-tanmay.kathpalia@altera.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] Custom properties ending in `-ps` silently fail to enforce `minimum` and `maximum` bounds due to implicit array typing by dt-schema.
--
commit 26eb3b1bd7c793df986336bb3146ad20c9cf5ca6
Author: Tanmay Kathpalia <tanmay.kathpalia@altera.com>
dt-bindings: mmc: add Cadence SD6HC binding
This commit introduces the device tree binding for the Cadence SD6HC
SD/SDIO/eMMC host controller. It defines the required clock domains, resets,
and specific PHY timing properties.
> diff --git a/Documentation/devicetree/bindings/mmc/cdns,sd6hc.yaml b/Documentation/devicetree/bindings/mmc/cdns,sd6hc.yaml
> new file mode 100644
> index 0000000000000..d5ea2717904b4
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mmc/cdns,sd6hc.yaml
[ ... ]
> +properties:
[ ... ]
> + cdns,iocell-input-delay-ps:
> + description:
> + Input delay across the IO cells, used for SD6HC PHY timing calculations.
> + minimum: 0
> + maximum: 20000
> + default: 2500
> +
> + cdns,iocell-output-delay-ps:
> + description:
> + Output delay across the IO cells, used for SD6HC PHY timing calculations.
> + minimum: 0
> + maximum: 20000
> + default: 2500
> +
> + cdns,delay-element-ps:
> + description:
> + DLL delay element size, used for SD6HC PHY timing calculations.
> + minimum: 1
> + maximum: 1000
> + default: 24
[Severity: Low]
Will the dt-schema validator actually enforce these minimum and maximum
bounds?
Because these properties use standard unit suffixes (-ps), the dt-schema
tooling implicitly types them as arrays (specifically, uint32-matrix).
In JSON Schema, the minimum and maximum keywords are strictly evaluated
only for numeric instances.
Since properties are parsed as array instances rather than scalar numbers,
these top-level numeric bounds are silently ignored by the JSON Schema
validator.
Could this be fixed by explicitly defining
$ref: /schemas/types.yaml#/definitions/uint32 to override the default array
type and enforce a scalar integer, or by placing the bounds within an items
validation block?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260901184828.15653-1-tanmay.kathpalia@altera.com?part=1
next prev parent reply other threads:[~2026-09-01 19:00 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-01 18:48 [PATCH v7 0/9] mmc: sdhci-cadence: add SD6HC support and Agilex5 enablement Tanmay Kathpalia
2026-09-01 18:48 ` [PATCH v7 1/9] dt-bindings: mmc: add Cadence SD6HC binding Tanmay Kathpalia
2026-09-01 19:00 ` sashiko-bot [this message]
2026-09-01 18:48 ` [PATCH v7 2/9] arm64: dts: agilex5: add SD/eMMC host controller Tanmay Kathpalia
2026-09-01 18:48 ` [PATCH v7 3/9] arm64: dts: agilex5: enable SD card on SOCDK OOBE card Tanmay Kathpalia
2026-09-01 19:01 ` sashiko-bot
2026-09-01 18:48 ` [PATCH v7 4/9] dt-bindings: arm: altera: add Agilex5 SOCDK eMMC board variant Tanmay Kathpalia
2026-09-01 18:48 ` [PATCH v7 5/9] arm64: dts: agilex5: add SOCDK eMMC daughter board Tanmay Kathpalia
2026-09-01 18:48 ` [PATCH v7 6/9] mmc: sdhci-cadence: rename SD4HC symbols for SD6HC groundwork Tanmay Kathpalia
2026-09-01 18:48 ` [PATCH v7 7/9] mmc: sdhci-cadence: refactor driver structure for V6 controller support Tanmay Kathpalia
2026-09-01 18:48 ` [PATCH v7 8/9] mmc: sdhci-cadence: add Cadence SD6HC support Tanmay Kathpalia
2026-09-01 19:10 ` sashiko-bot
2026-09-01 18:48 ` [PATCH v7 9/9] mmc: sdhci-cadence: add Altera Agilex5 " Tanmay Kathpalia
2026-09-11 7:35 ` [PATCH v7 0/9] mmc: sdhci-cadence: add SD6HC support and Agilex5 enablement Kathpalia, Tanmay
2026-09-11 9:49 ` Dinh Nguyen
2026-09-11 15:40 ` Ulf Hansson
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