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Tue, 1 Sep 2026 15:10:54 -0500 From: Alex Deucher To: , CC: Alex Deucher Subject: [PATCH 13/31] drm/amdgpu/sdma5.2: add tlb invalidation buffer func callback Date: Tue, 1 Sep 2026 16:10:16 -0400 Message-ID: <20260901201034.2960437-14-alexander.deucher@amd.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260901201034.2960437-1-alexander.deucher@amd.com> References: <20260901201034.2960437-1-alexander.deucher@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL6PEPF00022571:EE_|DM6PR12MB4300:EE_ X-MS-Office365-Filtering-Correlation-Id: 66d4ebd0-8927-4aae-c4f8-08df086525d9 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|1800799024|82310400026|36860700016|23010399003|376014|6133799003|22082099003|18002099003|56012099006|11063799006|10067099003; X-Microsoft-Antispam-Message-Info: 19an+lJkmlY7EREmNgybJFNaRyO3y0ew7bG9f4JeI61pXwbYRn0gWgnjDfEX7NPb9CA7Y8pneb+ihnwnG/NQhv7NOqx7pderPsdxgruCJuiROc3x/bZ97wI3FaLyYuO750g9c/HF2dIWWw1ia0oJrPb1DNGn/8wM+lNRCvcHakyMfAE3Dv0NAvTdGDCuZKaG8IE3MZYbajdHjLZg7vUpvMdDMcglsyHMg4bex4Nz6Ump671zgCpyfHvRgwiOqQi1fx7ZXeLenCCnF7uuvpMCLAYfI+S5yq8Q1w46vgyegXVKMWo/6SzSa0eoa9MRiX472fofCLnQ2z15+vBb0+DlmTbpfEN3/mYe4vUOHhY3hY96yFqaI4tkp8wvwYVvNVQxFh6jRTblzx0te/t5b/PdaoLKyffNq+H2Ka/hZwMNbqRnXJzE/qx1WD0HIyyoCHTO0wC0Sn2e1Y1znjmhzpBibHzFsVssUA3sKS0TZKXIBfkfhrdYBAaRNpidTVxZqiZLMwStvJ7JO1t+QP8eoAGJj4G48b0ZGmX7tRK8QRqIogjaS3gtXCu8HIT4Tfre1ws9VXA7jpn3BTuRai0YPTR41zMwB24G9P9Q0o1fp0Pb0yyvEOXcYzAgQ6xSVY0R6bZxzepYgdH50F0AxsWqCNeT4VVOMy8PLptrIBNr027OFQOp7gLVr3zc2nBFbREB7ldG7TEtE7coorb1gnmRp4SGdQ== X-Forefront-Antispam-Report: CIP:165.204.84.17; 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Ip=[165.204.84.17]; Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF00022571.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4300 X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" Will be used for TLB invalidation. Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c | 49 ++++++++++++++++++++++++++ 1 file changed, 49 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c index 35cdf6c149f86..a10086de35957 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c @@ -2038,6 +2038,52 @@ static void sdma_v5_2_emit_fill_buffer(struct amdgpu_ib *ib, ib->ptr[ib->length_dw++] = byte_count - 1; } +/** + * sdma_v5_2_emit_tlb_inv - Invalidate TLB using the sDMA engine + * + * @adev: amdgpu device structure + * @ib: indirect buffer to fill + * @vmid: vmid to target + * @vmhub: vmhub to target + * @eng: invalidation engine to use + * @flush_type: type of flush (lightweight, heavyweight) + * @xcc_inst: XCC to target + * + * Invalidate TLB using the DMA engine. + */ +static void sdma_v5_2_emit_tlb_inv(struct amdgpu_device *adev, + struct amdgpu_ib *ib, + unsigned int vmid, + u32 vmhub, + u32 eng, + u32 flush_type, + u32 xcc_inst) +{ + struct amdgpu_vmhub *hub = &adev->vmhub[vmhub]; + u32 inv_req = hub->vmhub_funcs->get_invalidate_req(vmid, flush_type); + u32 mmhub_eng, gfxhub_eng; + + if (AMDGPU_IS_GFXHUB(vmhub)) { + mmhub_eng = 0x1f; + gfxhub_eng = eng; + } else { + mmhub_eng = eng; + gfxhub_eng = 0x1f; + } + + /* Trigger invalidation. */ + ib->ptr[ib->length_dw++] = + (SDMA_PKT_VM_INVALIDATION_HEADER_OP(SDMA_OP_POLL_REGMEM) | + SDMA_PKT_VM_INVALIDATION_HEADER_SUB_OP(SDMA_SUBOP_VM_INVALIDATION) | + SDMA_PKT_VM_INVALIDATION_HEADER_GFX_ENG_ID(gfxhub_eng) | + SDMA_PKT_VM_INVALIDATION_HEADER_MM_ENG_ID(mmhub_eng)); + ib->ptr[ib->length_dw++] = inv_req; + ib->ptr[ib->length_dw++] = 0xFFFFFFFF; + ib->ptr[ib->length_dw++] = + (SDMA_PKT_VM_INVALIDATION_ADDRESSRANGEHI_INVALIDATEACK(1 << vmid) | + SDMA_PKT_VM_INVALIDATION_ADDRESSRANGEHI_ADDRESSRANGEHI(0x1F)); +} + static const struct amdgpu_buffer_funcs sdma_v5_2_buffer_funcs = { .copy_max_bytes = 1 << 30, .copy_num_dw = 7, @@ -2046,6 +2092,9 @@ static const struct amdgpu_buffer_funcs sdma_v5_2_buffer_funcs = { .fill_max_bytes = 1 << 30, /* HW supports 1 << 30, but PAL uses 1 << 22 */ .fill_num_dw = 5, .emit_fill_buffer = sdma_v5_2_emit_fill_buffer, + + .tlb_inv_num_dw = 4, + .emit_tlb_inv = sdma_v5_2_emit_tlb_inv, }; static void sdma_v5_2_set_buffer_funcs(struct amdgpu_device *adev) -- 2.55.0