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Tue, 1 Sep 2026 15:11:03 -0500 From: Alex Deucher To: , CC: Alex Deucher Subject: [PATCH 29/31] drm/amdgpu/gmc12: use MES or SDMA for pasid TLB invalidation Date: Tue, 1 Sep 2026 16:10:32 -0400 Message-ID: <20260901201034.2960437-30-alexander.deucher@amd.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260901201034.2960437-1-alexander.deucher@amd.com> References: <20260901201034.2960437-1-alexander.deucher@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL6PEPF00022571:EE_|SN7PR12MB7370:EE_ X-MS-Office365-Filtering-Correlation-Id: ce1138b4-3881-40a6-6e69-08df08652a9d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|23010399003|36860700016|82310400026|1800799024|376014|18002099003|22082099003|56012099006|11063799006|10067099003; X-Microsoft-Antispam-Message-Info: 2PmQcx3yCrgklhf72QrRwYayzqPewnYlrefu5jrK5cDUBs0oey1Ny9vY2E27PBjjjNgU7yZsIpjVAUHIxCwx95rk8bEaKw1XQi7CxKa5/4xgBKeHBwQrATRFWXp2NINL9b9GejPMi6U1icRebqMs1ND8pRN1u1pyEkXfnb+62OIm+78Nk765XCStMQhOWXVgepK3Ga1O+VqXM7llzB651L36TbT9kx6I7uTwmmFjvAPXYCREzgswAFRwkYedFB3dnJ94WNUhnCZaqXloEef44MziuF6TAxskWs7VxVyEj6NNvg0tCdg6oUE6AVO55zCL/2bKiKNJDe3zdaQr8J/fAp3/l6aNaXDTBpccAB6vuFURFied9Q1IS+/b1ksp87y5FKnrXx6D50fSnu4cy9+Y2x0b34DNJhbUpg9TgtnK3Yf5W6bi0zp7w1CdkY8TzVgbvS2AirR+Ajw0nCzoGIXlqoQCRhHMhNpUwk6m7UrONWu+/2KxTKAcpQUdd+b0sCg/9duYBhKt8DgrLvjg1a8T7m/1+BjbU9LPYs5ky93/C/Ls15JusxWaV40wSEDnMeKUUKwoZSEfM5X1Q3XQ96OTxL6uwe2Bbynp18HKa8tuNHUp9fO3sqUOZ3T8GHlyq1+vqV7HjRLbxTOAVMKcsCwAryTH1673Q5mSHJ2qis8xiAax0uEkxAm/eYj7r5oJoxdkh6giXaXUmCAOXn/xu2+w3w== X-Forefront-Antispam-Report: CIP:165.204.84.17; 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Ip=[165.204.84.17]; Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF00022571.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR12MB7370 X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" Use SDMA or MES rather than MMIO. The avoids the need to disallow gfxoff when invalidating. Default to SDMA and then use MES if the MES firmware supports it. Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c | 1 + drivers/gpu/drm/amd/amdgpu/mes_v12_0.c | 4 ++++ drivers/gpu/drm/amd/amdgpu/mes_v12_1.c | 4 ++++ 3 files changed, 9 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c index 6ec5798494be1..67eb1b595abe0 100644 --- a/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c @@ -1061,6 +1061,7 @@ static int gmc_v12_0_hw_init(struct amdgpu_ip_block *ip_block) int r; struct amdgpu_device *adev = ip_block->adev; + adev->gmc.pasid_inv_method = AMDGPU_TLB_INV_METHOD_SDMA; adev->gmc.gart_inv_method = AMDGPU_TLB_INV_METHOD_SDMA; /* The sequence of these two function calls matters.*/ diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c b/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c index ee72afdb0a1d3..dd68db14c43f6 100644 --- a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c +++ b/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c @@ -2097,6 +2097,10 @@ static int mes_v12_0_hw_init(struct amdgpu_ip_block *ip_block) adev->gfx.kiq[0].ring.sched.ready = false; adev->mes.ring[0].sched.ready = true; + if (adev->enable_uni_mes && + (adev->mes.sched_version & AMDGPU_MES_VERSION_MASK) >= 0x84) + adev->gmc.pasid_inv_method = AMDGPU_TLB_INV_METHOD_MES; + return 0; failure: diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v12_1.c b/drivers/gpu/drm/amd/amdgpu/mes_v12_1.c index f1098118d5c05..5eac7615efff5 100644 --- a/drivers/gpu/drm/amd/amdgpu/mes_v12_1.c +++ b/drivers/gpu/drm/amd/amdgpu/mes_v12_1.c @@ -1962,6 +1962,10 @@ static int mes_v12_1_hw_init(struct amdgpu_ip_block *ip_block) return r; } + if (adev->enable_uni_mes && + (adev->mes.sched_version & AMDGPU_MES_VERSION_MASK) >= 0x6f) + adev->gmc.pasid_inv_method = AMDGPU_TLB_INV_METHOD_MES; + return 0; } -- 2.55.0