From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 99B6F4A385D for ; Tue, 1 Sep 2026 20:24:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788294304; cv=none; b=gaAcZ9lbWHUqG7ADwIOYO+HqsXdVh58kgisiJa172RlbvyVRKIGn1zLRGmvY7TCGrf8g/c4NfMeklNNy7x3XSiXRjlCwyKTAZUBH4LpXaJv7Vn9c1EFP6VwNZAAihUPg25K1QLi8c9EDpI3uoq+OU9xVoIhkweNQb5kaXzOmzAY= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788294304; c=relaxed/simple; bh=a5SVRRN9w0PwK0ABgBe9wNnW3p3yXx6qaXn1I3+EPqc=; h=From:Subject:To:Cc:In-Reply-To:References:Content-Type:Date: Message-Id; b=n4BAh17n+s2Vwbu+CKeWgdK+8aw5Ou5JTzKpqpkBOmuuc+Sa8o7LbVFVc74rysOo3ZtYuss26Ps4hSShLRAQbFLo5rH5kFQH/ZZlH3kQ8ltEYaxOmei2AZPT18Bu/sEl9GgKws5PFPpEBSwcMK1ynFy5DEDZIrdo0TnAqymHKqY= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=bd3JPZAd; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="bd3JPZAd" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 60AD01F00A3A; Tue, 1 Sep 2026 20:24:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1788294297; bh=lMpnbppsBTrh/fgnz1BIZ4HEP60QWFMvATXC9tMJFLE=; h=From:Subject:Reply-To:To:Cc:In-Reply-To:References:Date; b=bd3JPZAdDq9ry0LbzABEAj44CPgUesjx1OnA20Um1XyEquAEnvA+tIgG+kf4jOj4G A/JEwwwYFZk6o6BsKOiXONy3x7COhFHiTSp6WECF7SslRm5MZY0pvAg7DBbUHu6lHl A2IEnwOnpPAHpx+LIYQ4SVcR9BEkzqMEgLYcqGH/CueIWsBxglowQSiA4CXRKVwpdD zB4BhUsVaLDZcLFG5fxRq8f/MViE7a7YYKMdKwLVIqFci6UbR3su1S/OCyOrTTWwsy MzKbIlNEcVKQ1jgPUEGPBnqI3PPoae0ke3e4D05Y9SVh/szol02Jqi4C3YWF8fZicE 3+oj1ep6SG4PA== From: sashiko-bot@kernel.org Subject: Re: [PATCH v16 2/2] phy: qcom-mipi-csi2: Add a CSI2 MIPI DPHY driver Reply-To: sashiko-reviews@lists.linux.dev To: =?utf-8?b?QnJ5YW4gTydEb25vZ2h1ZQ==?= Cc: conor+dt@kernel.org, linux-phy@lists.infradead.org, neil.armstrong@linaro.org, media-ci@linuxtv.org, robh@kernel.org, vkoul@kernel.org, devicetree@vger.kernel.org, olteanv@gmail.com In-Reply-To: <20260901-x1e-csi2-phy-v16-2-dd863b929080@linaro.org> References: <20260901-x1e-csi2-phy-v16-0-dd863b929080@linaro.org> <20260901-x1e-csi2-phy-v16-2-dd863b929080@linaro.org> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Date: Tue, 01 Sep 2026 20:24:57 +0000 Message-Id: <20260901202457.60AD01F00A3A@smtp.kernel.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Thank you for your contribution! Sashiko AI review found 1 potential issue(= s) to consider: - [Medium] The MIPI CSI-2 PHY driver validates the dynamically requested la= ne count in `phy_configure` but then drops it, always powering up all stati= cally connected lanes. -- commit 195a47fa2ff62bda0e1e24d4911794d18fcb86c8 Author: Bryan O'Donoghue phy: qcom-mipi-csi2: Add a CSI2 MIPI DPHY driver Add a new MIPI CSI2 driver in DPHY mode initially. The entire set of existing CAMSS CSI PHY init sequences are imported in order to save time and effort in later patches. > diff --git a/drivers/phy/qualcomm/phy-qcom-mipi-csi2-core.c b/drivers/phy= /qualcomm/phy-qcom-mipi-csi2-core.c > new file mode 100644 > index 0000000000000..24ccd3264686f > --- /dev/null > +++ b/drivers/phy/qualcomm/phy-qcom-mipi-csi2-core.c [ ... ] > +static int phy_qcom_mipi_csi2_configure(struct phy *phy, > + union phy_configure_opts *opts) > +{ > + struct mipi_csi2phy_device *csi2phy =3D phy_get_drvdata(phy); > + struct phy_configure_opts_mipi_dphy *dphy_cfg =3D &opts->mipi_dphy; > + struct mipi_csi2phy_stream_cfg *stream_cfg =3D &csi2phy->stream_cfg; > + int ret; > + > + ret =3D phy_mipi_dphy_config_validate(dphy_cfg); > + if (ret) > + return ret; > + > + if (dphy_cfg->lanes < 1 || dphy_cfg->lanes > CSI2_MAX_DATA_LANES) > + return -EINVAL; > + > + stream_cfg->link_freq =3D dphy_cfg->hs_clk_rate; > + > + return 0; > +} [Severity: Medium] Does this code inadvertently drop the requested lane count from opts->mipi_dphy.lanes? In phy_qcom_mipi_csi2_configure(), dphy_cfg->lanes is bounds-checked but never assigned to stream_cfg->num_data_lanes. This causes the dynamic lane count to be dropped. Because it is dropped, the driver later relies on the statically probed cou= nt when enabling the lanes: drivers/phy/qualcomm/phy-qcom-mipi-csi2-3ph-dphy.c:phy_qcom_mipi_csi2_lanes= _enable() { ... val =3D BIT(lane_cfg->clk.pos); for (i =3D 0; i < cfg->num_data_lanes; i++) val |=3D BIT(lane_cfg->data[i].pos * 2); ... } Should stream_cfg->num_data_lanes be updated here so that the PHY only powers up the requested subset of physically connected lanes? --=20 Sashiko AI review =C2=B7 https://sashiko.dev/#/patchset/20260901-x1e-csi2-p= hy-v16-0-dd863b929080@linaro.org?part=3D2 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DEB7DC624D3 for ; Tue, 1 Sep 2026 20:25:01 +0000 (UTC) DKIM-Signature: v=1; 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Tue, 01 Sep 2026 20:24:59 +0000 Received: from smtp.kernel.org (quasi.space.kernel.org [100.103.45.18]) by sea.source.kernel.org (Postfix) with ESMTP id 0415A43871; Tue, 1 Sep 2026 20:24:58 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 60AD01F00A3A; Tue, 1 Sep 2026 20:24:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1788294297; bh=lMpnbppsBTrh/fgnz1BIZ4HEP60QWFMvATXC9tMJFLE=; h=From:Subject:Reply-To:To:Cc:In-Reply-To:References:Date; b=bd3JPZAdDq9ry0LbzABEAj44CPgUesjx1OnA20Um1XyEquAEnvA+tIgG+kf4jOj4G A/JEwwwYFZk6o6BsKOiXONy3x7COhFHiTSp6WECF7SslRm5MZY0pvAg7DBbUHu6lHl A2IEnwOnpPAHpx+LIYQ4SVcR9BEkzqMEgLYcqGH/CueIWsBxglowQSiA4CXRKVwpdD zB4BhUsVaLDZcLFG5fxRq8f/MViE7a7YYKMdKwLVIqFci6UbR3su1S/OCyOrTTWwsy MzKbIlNEcVKQ1jgPUEGPBnqI3PPoae0ke3e4D05Y9SVh/szol02Jqi4C3YWF8fZicE 3+oj1ep6SG4PA== From: sashiko-bot@kernel.org Subject: Re: [PATCH v16 2/2] phy: qcom-mipi-csi2: Add a CSI2 MIPI DPHY driver To: =?utf-8?b?QnJ5YW4gTydEb25vZ2h1ZQ==?= Cc: conor+dt@kernel.org, linux-phy@lists.infradead.org, neil.armstrong@linaro.org, media-ci@linuxtv.org, robh@kernel.org, vkoul@kernel.org, devicetree@vger.kernel.org, olteanv@gmail.com In-Reply-To: <20260901-x1e-csi2-phy-v16-2-dd863b929080@linaro.org> References: <20260901-x1e-csi2-phy-v16-0-dd863b929080@linaro.org> <20260901-x1e-csi2-phy-v16-2-dd863b929080@linaro.org> Date: Tue, 01 Sep 2026 20:24:57 +0000 Message-Id: <20260901202457.60AD01F00A3A@smtp.kernel.org> X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: sashiko-reviews@lists.linux.dev MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org VGhhbmsgeW91IGZvciB5b3VyIGNvbnRyaWJ1dGlvbiEgU2FzaGlrbyBBSSByZXZpZXcgZm91bmQg MSBwb3RlbnRpYWwgaXNzdWUocykgdG8gY29uc2lkZXI6Ci0gW01lZGl1bV0gVGhlIE1JUEkgQ1NJ LTIgUEhZIGRyaXZlciB2YWxpZGF0ZXMgdGhlIGR5bmFtaWNhbGx5IHJlcXVlc3RlZCBsYW5lIGNv dW50IGluIGBwaHlfY29uZmlndXJlYCBidXQgdGhlbiBkcm9wcyBpdCwgYWx3YXlzIHBvd2VyaW5n IHVwIGFsbCBzdGF0aWNhbGx5IGNvbm5lY3RlZCBsYW5lcy4KLS0KCmNvbW1pdCAxOTVhNDdmYTJm ZjYyYmRhMGUxZTI0ZDQ5MTE3OTRkMThmY2I4NmM4CkF1dGhvcjogQnJ5YW4gTydEb25vZ2h1ZSA8 YnJ5YW4ub2Rvbm9naHVlQGxpbmFyby5vcmc+CgpwaHk6IHFjb20tbWlwaS1jc2kyOiBBZGQgYSBD U0kyIE1JUEkgRFBIWSBkcml2ZXIKCkFkZCBhIG5ldyBNSVBJIENTSTIgZHJpdmVyIGluIERQSFkg bW9kZSBpbml0aWFsbHkuIFRoZSBlbnRpcmUgc2V0IG9mCmV4aXN0aW5nIENBTVNTIENTSSBQSFkg aW5pdCBzZXF1ZW5jZXMgYXJlIGltcG9ydGVkIGluIG9yZGVyIHRvIHNhdmUgdGltZQphbmQgZWZm b3J0IGluIGxhdGVyIHBhdGNoZXMuCgo+IGRpZmYgLS1naXQgYS9kcml2ZXJzL3BoeS9xdWFsY29t bS9waHktcWNvbS1taXBpLWNzaTItY29yZS5jIGIvZHJpdmVycy9waHkvcXVhbGNvbW0vcGh5LXFj b20tbWlwaS1jc2kyLWNvcmUuYwo+IG5ldyBmaWxlIG1vZGUgMTAwNjQ0Cj4gaW5kZXggMDAwMDAw MDAwMDAwMC4uMjRjY2QzMjY0Njg2Zgo+IC0tLSAvZGV2L251bGwKPiArKysgYi9kcml2ZXJzL3Bo eS9xdWFsY29tbS9waHktcWNvbS1taXBpLWNzaTItY29yZS5jClsgLi4uIF0KPiArc3RhdGljIGlu dCBwaHlfcWNvbV9taXBpX2NzaTJfY29uZmlndXJlKHN0cnVjdCBwaHkgKnBoeSwKPiArCQkJCQl1 bmlvbiBwaHlfY29uZmlndXJlX29wdHMgKm9wdHMpCj4gK3sKPiArCXN0cnVjdCBtaXBpX2NzaTJw aHlfZGV2aWNlICpjc2kycGh5ID0gcGh5X2dldF9kcnZkYXRhKHBoeSk7Cj4gKwlzdHJ1Y3QgcGh5 X2NvbmZpZ3VyZV9vcHRzX21pcGlfZHBoeSAqZHBoeV9jZmcgPSAmb3B0cy0+bWlwaV9kcGh5Owo+ ICsJc3RydWN0IG1pcGlfY3NpMnBoeV9zdHJlYW1fY2ZnICpzdHJlYW1fY2ZnID0gJmNzaTJwaHkt PnN0cmVhbV9jZmc7Cj4gKwlpbnQgcmV0Owo+ICsKPiArCXJldCA9IHBoeV9taXBpX2RwaHlfY29u ZmlnX3ZhbGlkYXRlKGRwaHlfY2ZnKTsKPiArCWlmIChyZXQpCj4gKwkJcmV0dXJuIHJldDsKPiAr Cj4gKwlpZiAoZHBoeV9jZmctPmxhbmVzIDwgMSB8fCBkcGh5X2NmZy0+bGFuZXMgPiBDU0kyX01B WF9EQVRBX0xBTkVTKQo+ICsJCXJldHVybiAtRUlOVkFMOwo+ICsKPiArCXN0cmVhbV9jZmctPmxp bmtfZnJlcSA9IGRwaHlfY2ZnLT5oc19jbGtfcmF0ZTsKPiArCj4gKwlyZXR1cm4gMDsKPiArfQoK W1NldmVyaXR5OiBNZWRpdW1dCkRvZXMgdGhpcyBjb2RlIGluYWR2ZXJ0ZW50bHkgZHJvcCB0aGUg cmVxdWVzdGVkIGxhbmUgY291bnQgZnJvbQpvcHRzLT5taXBpX2RwaHkubGFuZXM/CgpJbiBwaHlf cWNvbV9taXBpX2NzaTJfY29uZmlndXJlKCksIGRwaHlfY2ZnLT5sYW5lcyBpcyBib3VuZHMtY2hl Y2tlZCBidXQKbmV2ZXIgYXNzaWduZWQgdG8gc3RyZWFtX2NmZy0+bnVtX2RhdGFfbGFuZXMuIFRo aXMgY2F1c2VzIHRoZSBkeW5hbWljIGxhbmUKY291bnQgdG8gYmUgZHJvcHBlZC4KCkJlY2F1c2Ug aXQgaXMgZHJvcHBlZCwgdGhlIGRyaXZlciBsYXRlciByZWxpZXMgb24gdGhlIHN0YXRpY2FsbHkg cHJvYmVkIGNvdW50CndoZW4gZW5hYmxpbmcgdGhlIGxhbmVzOgoKZHJpdmVycy9waHkvcXVhbGNv bW0vcGh5LXFjb20tbWlwaS1jc2kyLTNwaC1kcGh5LmM6cGh5X3Fjb21fbWlwaV9jc2kyX2xhbmVz X2VuYWJsZSgpIHsKICAgIC4uLgogICAgdmFsID0gQklUKGxhbmVfY2ZnLT5jbGsucG9zKTsKICAg IGZvciAoaSA9IDA7IGkgPCBjZmctPm51bV9kYXRhX2xhbmVzOyBpKyspCiAgICAgICAgdmFsIHw9 IEJJVChsYW5lX2NmZy0+ZGF0YVtpXS5wb3MgKiAyKTsKICAgIC4uLgp9CgpTaG91bGQgc3RyZWFt X2NmZy0+bnVtX2RhdGFfbGFuZXMgYmUgdXBkYXRlZCBoZXJlIHNvIHRoYXQgdGhlIFBIWSBvbmx5 CnBvd2VycyB1cCB0aGUgcmVxdWVzdGVkIHN1YnNldCBvZiBwaHlzaWNhbGx5IGNvbm5lY3RlZCBs YW5lcz8KCi0tIApTYXNoaWtvIEFJIHJldmlldyDCtyBodHRwczovL3Nhc2hpa28uZGV2LyMvcGF0 Y2hzZXQvMjAyNjA5MDEteDFlLWNzaTItcGh5LXYxNi0wLWRkODYzYjkyOTA4MEBsaW5hcm8ub3Jn P3BhcnQ9MgoKLS0gCmxpbnV4LXBoeSBtYWlsaW5nIGxpc3QKbGludXgtcGh5QGxpc3RzLmluZnJh ZGVhZC5vcmcKaHR0cHM6Ly9saXN0cy5pbmZyYWRlYWQub3JnL21haWxtYW4vbGlzdGluZm8vbGlu dXgtcGh5Cg==