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Wed, 2 Sep 2026 00:06:56 -0500 From: Ray Wu To: CC: Harry Wentland , Leo Li , Aurabindo Pillai , Roman Li , Wayne Lin , Tom Chung , "Fangzhi Zuo" , Dan Wheeler , Ray Wu , Ivan Lipski , Alex Hung , James Lin , Chenyu Chen , Dillon Varone , Alvin Lee , Ray Wu Subject: [PATCH 18/40] drm/amd/display: Add immediate restore to FAMS2 for DRR Date: Wed, 2 Sep 2026 12:58:40 +0800 Message-ID: <20260902050411.3473916-19-ray.wu@amd.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260902050411.3473916-1-ray.wu@amd.com> References: <20260902050411.3473916-1-ray.wu@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: LV8PEPF00000067:EE_|CH1PR12MB9693:EE_ X-MS-Office365-Filtering-Correlation-Id: de69004a-527e-41d3-32e8-08df08b00857 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|1800799024|376014|36860700016|23010399003|82310400026|56012099006|10067099003|11063799006|3023799007|18002099003|22082099003; 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DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: M4HKaf3D7SKyxaiimRG4O57cGe1IbYIM3c2QY6l17a/KpFc56KiJObFx2zRMDTCrBj1Ss1vUlqB9NCWG5WQ/wxPmRyvyFYrcwhdFcDwiVIW4ZwyuG6YQTRpGNyN5Vt5gu5q4xBS+L9/ltd9EA/apHr9BAngjPObekPFpEgzMWvXC/jvKsUlBusQXLZutSHGU3dsCRThHIbdf2RH/2gEKXrXnXqi2ahjUwE4lrJ/WS5XyWni+0fUGGhkAmD7WKgvFhgKCijz6ErsISgGGcfztuAAsVovoy/gPqjZYEyiUBItVzfzO/zMQ8YtW0KTxZvJAseHH2m+08v5OM6LLwq8E8xY+KOO03SRF2kEAgA+2gnjm+8JFCOtGx6uRcthSbK8DKerRjhbOW6XPEyw4dHmSniUAhrQd9j2hiPcISlMQHPUlyMZUla+E5H3Gtj2m0phN X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Sep 2026 05:07:05.6703 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: de69004a-527e-41d3-32e8-08df08b00857 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: LV8PEPF00000067.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH1PR12MB9693 X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" From: Dillon Varone [Why & How] Adds toggle to immediately restore FAMS2 streams instead of waiting for DRR VTotal changes to latch Reviewed-by: Alvin Lee Signed-off-by: Dillon Varone Signed-off-by: Ray Wu --- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 3 +++ drivers/gpu/drm/amd/display/dc/dc.h | 1 + drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c | 3 +++ drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 2 ++ 4 files changed, 9 insertions(+) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c index 9f64bea15ea1..8879196b2675 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c @@ -711,6 +711,9 @@ static int amdgpu_dm_init(struct amdgpu_device *adev) /* TODO: Remove after DP2 receiver gets proper support of Cable ID feature */ adev->dm.dc->debug.ignore_cable_id = true; + /* temporary enable immediate restore for FAMS2 */ + adev->dm.dc->debug.fams2_imm_restore_drr = true; + if (adev->dm.dc->caps.dp_hdmi21_pcon_support) drm_info(adev_to_drm(adev), "DP-HDMI FRL PCON supported\n"); diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h index e1f1b0602b6d..4b85727aaff9 100644 --- a/drivers/gpu/drm/amd/display/dc/dc.h +++ b/drivers/gpu/drm/amd/display/dc/dc.h @@ -1288,6 +1288,7 @@ struct dc_debug_options { uint32_t dml21_disable_pstate_method_mask; union fw_assisted_mclk_switch_version fams_version; union dmub_fams2_global_feature_config fams2_config; + bool fams2_imm_restore_drr; unsigned int force_cositing; unsigned int disable_spl; unsigned int force_easf; diff --git a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c index 143facdbde54..d08dd372179c 100644 --- a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c +++ b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c @@ -1847,6 +1847,9 @@ static void dc_dmub_srv_rb_based_fams2_update_config(struct dc *dc, memcpy(&stream_sub_state_cmd->config, &context->bw_ctx.bw.dcn.fams2_stream_sub_params[i], sizeof(union dmub_cmd_fams2_config)); + + /* temp override */ + stream_base_cmd->config.stream_v1.base.config.bits.imm_restore_drr = dc->debug.fams2_imm_restore_drr; } } diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h index 105a0f8762e8..a4043c5f22ea 100644 --- a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h +++ b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h @@ -2777,6 +2777,7 @@ struct dmub_fams2_stream_static_state { uint8_t is_drr : 1; // stream is DRR enabled uint8_t clamp_vtotal_min : 1; // clamp vtotal to min instead of nominal uint8_t min_ttu_vblank_usable : 1; // if min ttu vblank is above wm, no force pstate is needed in blank + uint8_t imm_restore_drr : 1; // does not wait to latch DRR vtotal on restore } bits; uint8_t all; } config; @@ -2809,6 +2810,7 @@ struct dmub_fams2_cmd_stream_static_base_state { uint8_t is_drr : 1; // stream is DRR enabled uint8_t clamp_vtotal_min : 1; // clamp vtotal to min instead of nominal uint8_t min_ttu_vblank_usable : 1; // if min ttu vblank is above wm, no force pstate is needed in blank + uint8_t imm_restore_drr : 1; // does not wait to latch DRR vtotal on restore } bits; uint8_t all; } config; -- 2.43.0