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[83.225.30.215]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-49ce5927b68sm58999265e9.1.2026.09.02.07.24.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Sep 2026 07:24:09 -0700 (PDT) From: Fernando Rimoli To: linux-media@vger.kernel.org Cc: sakari.ailus@linux.intel.com, dan.scally@ideasonboard.com, linux-kernel@vger.kernel.org, Fernando Rimoli , Jakob Berg Jespersen , Fil Dunsky , Lucas Lis , Kengo Oki , Mauro Carvalho Chehab Subject: [PATCH v5 7/7] media: ipu-bridge: Request non-continuous clock for ov5693 on IPU6 Date: Wed, 2 Sep 2026 16:23:21 +0200 Message-ID: <20260902142322.73523-8-fernandorimoli11@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260902142322.73523-1-fernandorimoli11@gmail.com> References: <20260831181858.325109-1-fernandorimoli11@gmail.com> <20260902142322.73523-1-fernandorimoli11@gmail.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The ov5693 (INT33BE / OVTI5693) needs its MIPI clock lane gated while idle for the IPU6 CSI-2 receiver to lock onto the link, which the sensor driver does when the endpoint requests a non-continuous clock. The same sensor works with a free-running clock on the IPU3, so request it only for the IPU6 variants where it has been confirmed on hardware: Tiger Lake, Alder Lake-P and Alder Lake-N. Signed-off-by: Fernando Rimoli Tested-by: Jakob Berg Jespersen # Surface Pro 7+, IPU6 Tiger Lake Tested-by: Fil Dunsky # Surface Pro 8, IPU6 Tiger Lake (8086:9a19) Tested-by: Lucas Lis # Surface Pro 7+, IPU6 Tiger Lake (0x9a19) Tested-by: Kengo Oki # Surface Go 4, IPU6 Alder Lake-N 8086:462e --- drivers/media/pci/intel/ipu-bridge.c | 19 +++++++++++++++++++ include/media/ipu-bridge.h | 5 +++++ 2 files changed, 24 insertions(+) diff --git a/drivers/media/pci/intel/ipu-bridge.c b/drivers/media/pci/intel/ipu-bridge.c index 5efdcb9c8..12f1cccd8 100644 --- a/drivers/media/pci/intel/ipu-bridge.c +++ b/drivers/media/pci/intel/ipu-bridge.c @@ -16,6 +16,7 @@ #include #include +#include #include #define ADEV_DEV(adev) ACPI_PTR(&((adev)->dev)) @@ -49,6 +50,14 @@ * * Please keep the list sorted by ACPI HID. */ +/* IPU6 variants whose CSI-2 receiver needs the ov5693 clock lane gated */ +static const u16 ipu6_ov5693_ncont_clk[] = { + PCI_DEVICE_ID_INTEL_IPU6, /* Tiger Lake */ + PCI_DEVICE_ID_INTEL_IPU6EP_ADLP, /* Alder Lake-P */ + PCI_DEVICE_ID_INTEL_IPU6EP_ADLN, /* Alder Lake-N */ + 0 +}; + static const struct ipu_sensor_config ipu_supported_sensors[] = { /* Himax HM1092 */ IPU_SENSOR_CONFIG("HIMX1092", 2, 180000000, 180480000), @@ -61,6 +70,9 @@ static const struct ipu_sensor_config ipu_supported_sensors[] = { /* GalaxyCore GC0310 */ IPU_SENSOR_CONFIG("INT0310", 1, 55692000), /* Omnivision OV5693 */ + IPU_SENSOR_CONFIG_MATCH_FL("INT33BE", ipu6_ov5693_ncont_clk, + IPU_BR_FL_CSI2_CLK_NONCONTINUOUS, + 1, 419200000), IPU_SENSOR_CONFIG("INT33BE", 1, 419200000), /* Onsemi MT9M114 */ IPU_SENSOR_CONFIG("INT33F0", 1, 384000000), @@ -97,6 +109,9 @@ static const struct ipu_sensor_config ipu_supported_sensors[] = { /* Omnivision OV5675 */ IPU_SENSOR_CONFIG("OVTI5675", 1, 450000000), /* Omnivision OV5693 */ + IPU_SENSOR_CONFIG_MATCH_FL("OVTI5693", ipu6_ov5693_ncont_clk, + IPU_BR_FL_CSI2_CLK_NONCONTINUOUS, + 1, 419200000), IPU_SENSOR_CONFIG("OVTI5693", 1, 419200000), /* Omnivision OV8856 */ IPU_SENSOR_CONFIG("OVTI8856", 3, 180000000, 360000000, 720000000), @@ -526,6 +541,10 @@ static void ipu_bridge_create_fwnode_properties( cfg->link_freqs, cfg->nr_link_freqs); + if (cfg->flags & IPU_BR_FL_CSI2_CLK_NONCONTINUOUS) + sensor->ep_properties[IPU_BRIDGE_NEXT_PROPERTY(i, EP_CLOCK_NONCONTINUOUS)] = + PROPERTY_ENTRY_BOOL("clock-noncontinuous"); + sensor->ipu_properties[0] = PROPERTY_ENTRY_U32_ARRAY_LEN( sensor->prop_names.data_lanes, bridge->data_lanes, sensor->lanes); diff --git a/include/media/ipu-bridge.h b/include/media/ipu-bridge.h index aca76ff71..eec8c4688 100644 --- a/include/media/ipu-bridge.h +++ b/include/media/ipu-bridge.h @@ -17,6 +17,10 @@ #define IPU_SENSOR_ROTATION_NORMAL 0 #define IPU_SENSOR_ROTATION_INVERTED 1 +/* Flags for struct ipu_sensor_config */ +/* The sensor's CSI-2 transmitter needs a non-continuous clock */ +#define IPU_BR_FL_CSI2_CLK_NONCONTINUOUS BIT(0) + /* * Sensor config specific to one or more IPUs, identified by their PCI product * IDs, with flags describing what the sensor needs there. Entries for one HID @@ -80,6 +84,7 @@ enum ipu_bridge_ep_props { IPU_BRIDGE_EP_DATA_LANES, IPU_BRIDGE_EP_REMOTE_EP, IPU_BRIDGE_EP_LINK_FREQUENCIES, + IPU_BRIDGE_EP_CLOCK_NONCONTINUOUS, IPU_BRIDGE_EP_NUM_OF, IPU_BRIDGE_EP_NUM_ENTRIES }; -- 2.43.0