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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-49ce591f846sm26874605e9.1.2026.09.02.08.21.17 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 02 Sep 2026 08:21:18 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Mark Cave-Ayland , Peter Maydell , Paolo Bonzini , qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, Richard Henderson , Pierrick Bouvier , qemu-riscv@nongnu.org, qemu-arm@nongnu.org, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH v3 04/11] accel/tcg: Document cpu_exec_interrupt() callback contract Date: Wed, 2 Sep 2026 17:20:35 +0200 Message-ID: <20260902152044.31291-5-philmd@oss.qualcomm.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260902152044.31291-1-philmd@oss.qualcomm.com> References: <20260902152044.31291-1-philmd@oss.qualcomm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Authority-Analysis: v=2.4 cv=H4/rBeYi c=1 sm=1 tr=0 ts=6a983ef0 cx=c_pps a=hnmNkyzTK/kJ09Xio7VxxA==:117 a=4s3hRJSeHn4rkQlkrse1kQ==:17 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=M51BFTxLslgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=ZpdpYltYx_vBUK5n70dp:22 a=EUspDBNiAAAA:8 a=SWPfrzv3WwVL6hwBn9sA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=PEH46H7Ffwr30OY-TuGO:22 X-Proofpoint-GUID: LxgrlK6cToqcq-1XE3RD3hEganaCBx0k X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTAyMDEzNSBTYWx0ZWRfXzeCengirvBCN noklULrWe1g88DhDuw6e7KSrgJMIXwXS01M3QYhxnzPzxy+idwKgXIC9LHEYE0BAmAL45Eid8Vd dtixzraRKsab8uqXNUNwkt2dn90r9rBVdTk/cJjTJEx03svw4O49eHGzwKCwSzDvkHAc0OqfpWI dKfpWGCALsX7UTR+IZDcCaz1yN6HKVyAUQdTl4qP4iL+kaY/eR/a9aMorGdupjF1Zt5MSzj68Li ofNUMqGhlHHWJV0mU5oh5u8uhHbeU5qElvZpXeuwvKAbiQ/F+l0tRAn2k1NqZPkP2Pu191g5sKh SHn1cbq9FSeuLClw1JaCHp54p7O+aKlgO95BNpBeTNlmxEm8RLtKAY94OQ+WbFfKr5KwtoLAIRK QiGzwl1Kr05sokR0Q2GRIk6JiGFzC9IsJ1T2dRElPRGr9rPEnWWM3t1OEqvqBA7MibuDl/1+jPp whDv1yLBzFJ0/1oa6Bw== X-Proofpoint-Spam-Info: AW1haW4tMjYwOTAyMDEzNSBTYWx0ZWRfX0rL02MbrcASu XciDVPhO8FoRj7RTcTCAY2h+XhX89lircAxm3CI/7w3EcTyqU+x0H7EjO8LcChfMgyP444wgZEe N9MzohEJdM/h/ZMiqYYfbAXUPVoeyQw= X-Proofpoint-ORIG-GUID: LxgrlK6cToqcq-1XE3RD3hEganaCBx0k X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-02_03,2026-09-01_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 priorityscore=1501 adultscore=0 bulkscore=0 clxscore=1015 malwarescore=0 spamscore=0 phishscore=0 impostorscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2609020135 Received-SPF: pass client-ip=205.220.180.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Expand docstring to clarify that @interrupt_request is a bitmask, the handler is called with BQL held, and document the return value semantics. Fix typo in arm_cpu_exec_interrupt() documentation (s/inrerrupt/interrupt). Signed-off-by: Philippe Mathieu-Daudé --- include/accel/tcg/cpu-ops.h | 15 ++++++++++++++- target/arm/internals.h | 2 +- 2 files changed, 15 insertions(+), 2 deletions(-) diff --git a/include/accel/tcg/cpu-ops.h b/include/accel/tcg/cpu-ops.h index ded7cc700df..87850402203 100644 --- a/include/accel/tcg/cpu-ops.h +++ b/include/accel/tcg/cpu-ops.h @@ -171,8 +171,21 @@ struct TCGCPUOps { #else /** @do_interrupt: Callback for interrupt handling. */ void (*do_interrupt)(CPUState *cpu); - /** @cpu_exec_interrupt: Callback for processing interrupts in cpu_exec */ + + /** + * @cpu_exec_interrupt: Callback for processing target-specific interrupts + * @cpu: cpu context + * @interrupt_request: Bitmask of pending interrupts + * + * Called from cpu_handle_interrupt() with the BQL held. Process the + * pending interrupt according to the target specific @interrupt_request + * masking rules. + * + * Returns: %true if an interrupt was processed and the next TB should + * be restarted, %false to continue normal execution. + */ bool (*cpu_exec_interrupt)(CPUState *cpu, int interrupt_request); + /** @cpu_exec_reset: Callback for reset in cpu_exec. */ void (*cpu_exec_reset)(CPUState *cpu); /** diff --git a/target/arm/internals.h b/target/arm/internals.h index 1775835ad50..551a6b4a872 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -1248,7 +1248,7 @@ static inline const char *aarch32_mode_name(uint32_t psr) } /** - * arm_cpu_exec_interrupt(): Implementation of the cpu_exec_inrerrupt hook. + * arm_cpu_exec_interrupt(): Implementation of the cpu_exec_interrupt hook. */ bool arm_cpu_exec_interrupt(CPUState *cs, int interrupt_request); -- 2.53.0