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Wed, 02 Sep 2026 21:46:39 -0700 (PDT) Received: from localhost.localdomain ([76.133.142.170]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1431994db8csm2337726c88.9.2026.09.02.21.46.38 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 02 Sep 2026 21:46:38 -0700 (PDT) From: 54weasels <54weasels@gmail.com> To: qemu-devel@nongnu.org Cc: laurent@vivier.eu, balaton@eik.bme.hu, 54weasels <54weasels@gmail.com> Subject: [PATCH v5 0/6] Implement missing functionality and hooks in m68k to support upcoming Sun-3 implementation Date: Wed, 2 Sep 2026 21:45:13 -0700 Message-ID: <20260903044626.24453-1-54weasels@gmail.com> X-Mailer: git-send-email 2.50.1 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::531; envelope-from=54weasels@gmail.com; helo=mail-pg1-x531.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org This series adds M68020/030-specific features to the m68k target that are required by the Sun-3 machine (series C) and its PROM/SunOS guests: 1/6: CAAR register stub for 68020/030 cache control 2/6: fsave/frestore fix for 68881 (non-68040) FPU frames 3/6: Edge-triggered NMI semantics for Level 7 interrupts 4/6: Function code extraction during TLB fills 5/6: Custom MMU intercept hook for Sun-3 transparent translation 6/6: Physical Bus Error and M68020 Format 0xB stack frames Changes since v4: - Added Signed-off-by to all patches. - Patch 2/6 (fsave): Addressed Zoltan's review — replaced redundant M68040||FPU check with just M68K_FEATURE_FPU, removed unnecessary if/else in frestore, moved Context: below --- separator. - Patch 3/6 (NMI): Addressed Zoltan's review — nmi_pending cannot be replaced by testing pending_level == 7. The flag captures the edge transition (level < 7 → 7) required by Motorola's NMI specification, while pending_level only reflects the current interrupt level. Testing pending_level alone would produce level-triggered behavior, firing on every interrupt check rather than once per edge. - Rebased on current master. 54weasels (6): target/m68k: Add dummy CAAR register target/m68k: Fix fsave/frestore for 68881 FPU target/m68k: Fix NMI pending for Level 7 interrupts target/m68k: Extract Function Codes during TLB fills target/m68k: Implement custom MMU intercept hook target/m68k: Implement Physical Bus Error and Stack target/m68k/cpu.c | 4 +- target/m68k/cpu.h | 21 ++++- target/m68k/helper.c | 130 ++++++++++++++++++++++++++++- target/m68k/op_helper.c | 175 ++++++++++++++++++++++++++-------------- target/m68k/translate.c | 30 ++++--- 5 files changed, 280 insertions(+), 80 deletions(-) -- 2.50.1 (Apple Git-155)